74LVC16374ABQ 查看數據表（PDF） - NXP Semiconductors.
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74LVC16374ABQ Datasheet PDF : 19 Pages
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NXP Semiconductors
74LVC16374A; 74LVCH16374A
16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state
5.2 Pin description
Table 2. Pin description
Symbol Pin
SOT370-1 and SOT362-1
1OE, 2OE 1, 24
GND
4, 10, 15, 21, 28, 34, 39, 45
VCC
7, 18, 31, 42
1Q0 to 1Q7 2, 3, 5, 6, 8, 9, 11, 12
2Q0 to 2Q7 13, 14, 16, 17, 19, 20, 22, 23
1D0 to 1D7 47, 46, 44, 43, 41, 40, 38, 37
2D0 to 2D7 36, 35, 33, 32, 30, 29, 27, 26
1CP, 2CP 48, 25
Description
SOT1134-1
A30, A13
output enable input (active LOW)
A32, A3, A8, A11, A16, A19, A24, A27 ground (0 V)
A1, A10, A17, A26
supply voltage
B20, A31, D5, D1, A2, B2, B3, A5
data output
A6, B5, B6, A9, D2, D6, A12, B8
data output
B18, A28, D8, D4, A25, B16, B15, A22 data input
A21, B13, B12, A18, D3, D7, A15, B10 data input
A29, A14
clock input
6. Functional description
Table 3. Function selection[1]
Operating mode
Input
nOE
nCP
nDn
Load and read register
L
↑
l
L
↑
h
Load register and disable outputs
H
↑
l
H
↑
h
[1] H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the HIGH-to-LOW CP transition;
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the HIGH-to-LOW CP transition;
↑ = LOW-to-HIGH transition;
Z = high-impedance OFF-state.
7. Limiting values
Internal flip-flop Output nQ0 to nQ7
L
L
H
H
L
Z
H
Z
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Max
Unit
VCC
supply voltage
−0.5
+6.5
V
IIK
input clamping current
VI < 0 V
−50
-
mA
VI
input voltage
[1] −0.5
+6.5
V
IOK
output clamping current
VO > VCC or VO < 0 V
-
±50
mA
VO
output voltage
output HIGH-or LOW-state
[2] −0.5
VCC + 0.5 V
output 3-state
[2] −0.5
+6.5
V
IO
ICC
IGND
Tstg
output current
supply current
ground current
storage temperature
VO = 0 V to VCC
-
±50
mA
-
100
mA
−100
-
mA
−65
+150
°C
74LVC_LVCH16374A_7
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 07 — 23 March 2010
© NXP B.V. 2010. All rights reserved.
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