FS6285-XX(2002) 查看數據表（PDF） - AMI Semiconductor

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FS6285-XX
(Rev.:2002)

Dual PLL Clock Generator IC

AMI Semiconductor 

FS6285

Dual PLL Clock Generator IC

1.0 Features

• Dual phase-locked loop (PLL) device with three out-

put clock frequencies

• 3.3V supply voltage

• Small circuit board footprint (8-pin 0.150″ SOIC)

• Custom frequency selections available - contact your

local AMI Sales Representative for more information

Figure 1: Pin Configuration

CLKA 1

VSS 2

XIN 3

XOUT 4

8 SEL

7 VDD

6 CLKC

5 CLKB

8-pin (0.150″) SOIC

2.0 Description

The FS6285 is a monolithic CMOS clock generator IC

designed to minimize cost and component count in digital

video/audio systems.

Two high-resolution phase-locked loops generate three

output clocks (CLKA, CLKB, & CLKC) through an array of

post-dividers. All frequencies are ratiometrically derived

from the crystal oscillator frequency. The locking of all the

output frequencies together can eliminate unpredictable

artifacts in video systems and reduce electromagnetic

interference (EMI) due to frequency harmonic stacking.

Table 1: Crystal / Output Frequencies

DEVICE fXIN (MHz) CLKA (MHz) CLKB (MHz) CLKC (MHz)

FS6285

27.0000

36.8640

(fXIN* 512 / 375)

16.9344

(fXIN* 392 / 625)

NOTE: Contact AMI for custom PLL frequencies

16.9344

(fXIN* 392 / 625)

27.0000

(fXIN)

Figure 2: Block Diagram

XIN

XOUT

CRYSTAL

OSC.

SEL

CLKA

PLL

DIVIDER

ARRAY

CLKB

PLL

CLKC

FS6285

This document contains information on a preproduction product. Specifications and information herein are subject to change without notice.

ISO9001

2.28.02

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