ATC18RHA(2005) 查看數據表（PDF） - Atmel Corporation

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ATC18RHA
(Rev.:2005)

Rad. Hard 0.18 µm CMOS Cell-based ASIC for Space Use

Atmel Corporation 

ATC18RHA

The final agreement for processing the parts is mentioned in a formal document which is signed

by both sides, and includes all the reference file names and technical comments, with a check

list.

Phase 4: Prototypes

Once the Design Review meeting has been held, the project database is transferred to the

Atmel factory in Nantes (France). This database is then followed step by step by the Product

Engineering (PE) group.

The masks and test devices are created and used to process and test the samples before and

after the assembly steps.

The test program generated during the development phase is applied either onto the wafer or

after the dice are packaged. The Credence Octet test equipment is used for this operation. The

samples are then shipped to the customer for functional acceptance.

Deliverables

Table 4. Deliverables at the end of each phase

DESIGN PHASE

DELIVERABLE

FEASIBILITY STUDY

ASIC feasibility study report (APF-tc-FSR-project code).

Design start review document (APF-tc-DSR-project code).

ASIC logic review document (APF-tc-LR-project code) +

Files as required in the document.

LOGIC DESIGN

Updated DSR document

ASIC design review document (APF-tc-DR-project code) +

Files as required in the document.

PHYSICAL DESIGN

Updated DSR document

PROTOTYPES MANUFACTURING

& TEST

Packaged parts and associated documents

WHO

Atmel

CUSTOMER

Atmel

CUSTOMER

Atmel

Atmel

MPW new

Milestones

Though a large increase in performance is reached using 0.18µm process, many designs would

not be able to benefit from the advanced technology due to the high costs involved. Therefore,

Atmel proposes, in cooperation with the European Space Agency who manages the eligible

designs and launch dates, a Multi Project Wafer service called SMPW (Space Multi Project

Wafer) to its customers.

It is a way to decrease the cost of the reticules and silicon by sharing them over a number of

designs.

Specific milestones have been created to coordinate, manage the activities and guarantee that

there will be no interaction between any customer design and the others.

The main milestones are the Logic Review Closing Date (LRCD) and the Design Review Clos-

ing Date (DRCD).

The LR meeting must be held prior to the LRCD. The DR meeting must be held prior to the

DRCD. For this reason, Pre Logic and Pre Design Reviews are strongly recommended.

For each SMPW run, those dates are known in advance. A procedure has been defined to

embark on a run. In summary, a request to embark has to be made and the reservation on a run

occurs once the LRCD is passed. Any question related to the SMPW service can be addressed

to the hotline, at the following email address: smpw-atc18@nto.atmel.com.

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4261B–AERO–06/05

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