GLT41016 查看數據表（PDF） - G-Link Technology

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GLT41016

64K X 16 CMOS DYNAMIC RAM WITH EXTENDED DATA OUTPUT

G-Link Technology  

G -LINK

GLT41016

64K X 16 CMOS DYNAMIC RAM WITH EXTENDED DATA OUTPUT

May 1997 (Rev 1)

controlled by tCAC.

4. Either tRRH or tRCH must be satisfied for a Read Cycle.

5. Access time is determined by the longest of tAA, tCAC and tCPA.

6. Assumes that tRAD t tRAD (max.).

7. Operation within the tRAD (max.) limit ensures that tRAC (max.) can be met. tRAD (max.)

is specified as a reference point only. If tRAD is greater than the specified tRAD (max.)

limit, the access time is controlled by tAA and tCAC.

8. tWCS, tRWD, tAWD and tCWD are not restrictive operating parameters.

9. tWCS (min.) must be satisfied in an Early Write Cycle.

10. tDS and tDH are referenced to the latter occurrence of CAS of WE .

11. tT is measured between VIH (min.) and VIL (max.). AC-measurements assume tT = 2 ns.

G-Link Technology Corporation

2701Northwestern Parkway

Santa Clara, CA 95051, U.S.A.

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G-Link Technology Corporation, Taiwan

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Hsin Chu, Taiwan, R.O.C.

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