ICS8343 查看數據表（PDF） - Integrated Circuit Systems
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ICS8343 Datasheet PDF : 7 Pages
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Integrated
Circuit
Systems, Inc.
ICS8343
LOW SKEW 1-TO-16
FANOUT BUFFER
ABSOLUTE MAXIMUM RATINGS
Supply Voltage
Inputs
Outputs
Ambient Operating Temperature
Storage Temperature
7V
-0.5V to VDD+0.5 V
-0.5V to VDD+0.5V
0°C to 70°C
-65°C to 150°C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifi-
cations only and functional operation of the device at these or any conditions beyond those listed in the DC Electrical Characteristics or AC Electrical
Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
TABLE 4A. DC ELECTRICAL CHARACTERISTICS, VDD = VDD1 = VDD2 = 3.3V±5%, TA = 0° TO 70°C
Symbol
Parameter
Test Conditions
Minimum Typical
VDD, VDD1, VDD2 Operating Supply Voltage
3.135
3.3
CLK
VDD = 3.465V
2
VIH
Input High Voltage
OEx
VDD = 3.465V
2
VIL
Input Low Voltage CLK
VDD = 3.135V
-0.3
OEx
VDD = 3.135V
-0.3
IIH
Input High Current CLK
VIN = VDD
OEx
VIN = VDD
IIL
Input Low Current
CLK
VIN = 0V
-15
OEx
VIN = 0V
-15
IDD
Input Operating Supply Current
VOH
Output High Voltage
VDD = 3.135V, IOH = -25mA
2.4
VOL
Output Low Voltage
VDD = 3.135V, IOL = 25mA
IOZH
High Impedance Leakage Current
OEx = 0V, VOUT = VDD
IOZL
High Impedance Leakage Current
OEx = 0V, VOUT = 0V
-1
Maximum
3.465
VDD + 0.3
VDD + 0.3
0.8
0.8
1
1
100
0.8
1
Units
V
V
V
V
V
µA
µA
µA
µA
µA
V
V
µA
µA
TABLE 5A. AC ELECTRICAL CHARACTERISTICS, VDD = VDD1 = VDD2 = 3.3V±5%, TA = 0° TO 70°C
Symbol
Parameter
Test Conditions
Minimum Typical Maximum Units
fMAX
Maximum Input Frequency
200
MHz
tpLH
Propagation Delay, Low-to-High
0 < f ≤ 200MHz
1.1
2.1
3.1
ns
tpHL
Propagation Delay, High-to-Low
0 < f ≤ 200MHz
1.2
2.0
2.7
ns
tsk(o)
Output Skew; NOTE 3
Measured on rising edge @VDDx/2
250
ps
tsk(p)
Process Skew; NOTE 4
Measured on rising edge @VDDx/2
450
ps
tsk(pp)
Part-to-Part Skew; NOTE 5
Measured on rising edge @VDDx/2
700
ps
tR
Output Rise Time
0.5
0.8
ns
tF
Output Fall Time
0.9
1.7
ns
tPW
Output Pulse Width
tCYCLE/2
- 0.5
tCYCLE/2
tCYCLE/2
+ 0.5
ns
NOTE 1: All parameters measured at fMAX unless noted otherwise.
NOTE 2: Outputs terminated with 50Ω resistor connected to VDDx/2.
NOTE 3: Defined as skew across outputs at the same supply voltages and with equal load conditions.
NOTE 4: Defined as skew at the same output on different devices operating at the same supply voltages and with equal load conditions.
NOTE 5: Defined as skew at different outputs on different devices operating at the same supply voltages and with equal load conditions.
8343
www.icst.com
3
REV. C, 07072000
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