MC-45V8AB641
AC characteristics
Parameter
• Clock cycle time
• Access time from CLK
CLK high level width
CLK low level width
Data-out hold time
Data-out low-impedance time
• Data-out high-impedance time
Data-in setup time
Data-in hold time
Address, Command, DQM setup time
Address, Command, DQM hold time
CKE setup time
CKE hold time
CKE setup time (Power down exit)
• Transition time
Refresh time (4,096 refresh cycle)
Mode register set cycle time
Note 1. Output load.
Output
Symbol
tCK2
tAC2
tCH
tCL
tOH
tLZ
tHZ2
tDS
tDH
tS
tH
tCKS
tCKH
tCKSP
tT
tREF
tRSC
-A75
MIN. MAX.
7.5
−
−
5.4
2.5
−
2.5
−
2.7
−
0
−
2.5 5.4
1.5
−
0.8
−
1.5
−
0.8
−
1.5
−
0.8
−
1.5
−
0.5 30
−
64
2
−
-A10
MIN. MAX.
10
−
−
6
3
−
3
−
3
−
0
−
3
6
2
−
1
−
2
−
1
−
2
−
1
−
2
−
1
30
−
64
2
−
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
CLK
Note
1
1
Z = 50 Ω
50 pF
8
Data Sheet M14619EJ2V0DS00