MC68160BFB 查看數據表（PDF） - Motorola => Freescale

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MC68160BFB

ENHANCED ETHERNET INTERFACE TRANSCEIVER

Motorola => Freescale 

MC68160 MC68160B MC68160C

AUI TRANSMIT SWITCHING

Characteristic

TCLK to ATX Pair Steady State Propagation Delay

Output Differential Rise and Fall Times (Measured directly at device pins)

ATX Bit Cell Duration center–to–center (Measured directly at device pins)

ATX Half–Bit Cell Duration center–to–boundary (Measured directly at device pins)

ATX Pair Held at Positive Differential at start of Idle (Measured through

transformer)

NOTE: Load on specified output is a shunt 27 µH inductor and 83 Ω resistor.

Symbol

t240

t241

t242

t243

t244

Min

Typ

Max

–

–

100

1.0

–

5.0

– 99.5–100.5 –

–

49.5–50.5

–

200

–

–

Unit

ns

ns

ns

ns

ns

Figure 38. ATX Transmit Timings

TCLK

1.5V

TENA

TX

ATX+/–

Differential

(Logic Levels)

1

0

1

0

t240

0V 1

0

1

t242

0

1

t241

90%

0

0

10%

t243

1

t241

90%

1 0V

10%

t244

70%

1

AUI RECEIVE SWITCHING

Characteristic

Symbol

Min

Max

Unit

ARX/ACX Differential Input Voltage Range

–

±318

±1315

mV

ARX/ACX Differential Input Pulse Width to:

Initiate Data Reception

Inhibit Data Reception

RENA Assertion Delay

RENA Deassertion Delay

ns

t261

30

–

t262

–

18

t266

–

100

ns

t267

–

450

Squelching Characteristics

The receive data pairs and the collision pairs should have the following squelch characteristics:

1. The squelch circuits are on at idle (with input voltage at approximately 0 V differential).

2. If an input is in squelch, pulse is rejected if the peak differential voltage is more positive than –175 mV, regardless of pulse width.

3. A pulse is considered valid if its peak differential voltage is more negative than –300 mV and its width, measured at –285 mV, is > 25 ns.

4. The squelch circuits are disabled by the first valid negative differential pulse on either the AUI receive data or collision pair.

5. If a positive differential pulse occurs on either the AUI receive data or collision pair > 175 ns, end of frame is assumed and squelch circuitry is turned on.

Figure 39. ARX/ACX Timing

ARX+/–

ACX+/–

Differential

Input Voltage

+175mV

–175mV

t261/ t262

24

MOTOROLA ANALOG IC DEVICE DATA

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