SX28AA-I/DP 查看數據表（PDF） - Unspecified
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SX28AA-I/DP Datasheet PDF : 52 Pages
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SX18AC/SX20AC/SX28AC/SX18AC75/SX20AC75/SX28AC75
Function Registers
INDF
RTCC
PC
STATUS
FSR
RA
RB
RC
Bank 0
00
Registers
(8 bytes)
07
SRAM
(8 bytes)
0F
Bank 0 is always accessed for
the lower 16 addresses,
irrespective of the three high-
order bits of FSR.
7 6 5 4 3 2 1 0 FSR
Bank 7 F0
Bank 6 D0
Bank 5 B0
Bank 4 90
Bank 3 70
Bank 2 50
FF
Bank 1 30
10
Bank 0
DF
BF
SRAM
(16 bytes
each bank
128 bytes
total)
9F
7F
5F
3F
1F
Figure 6-1. Data Memory Organization
© 2000 Scenix Semiconductor, Inc. All rights reserved.
- 16 -
www.scenix.com
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