TSC87C52-25IGR 查看數據表（PDF） - Temic Semiconductors

零件编号

产品描述 (功能)

生产厂家

TSC87C52-25IGR

CMOS 0 to 33 MHz Programmable 8–bit Microcontroller

Temic Semiconductors 

TSC87C52

DC Parameters for Low Voltage, commercial and industrial temperature range

TA = 0°C to +70°C; VSS = 0V; VCC = 2.7V to 5V ± 10%; F = 0 to 16 MHz.

TA = –40°C to +85°C; VSS = 0V; VCC = 2.7V to 5V ± 10%; F = 0 to 16 MHz.

Symbol

Parameter

Min

VIL Input Low Voltage

–0.5

VIH Input High Voltage except XTAL1, RST

0.2 VCC + 0.9

VIH1

VOL

VOL1

Input High Voltage, XTAL1, RST

Output Low Voltage, ports 1, 2, 3 (6)

Output Low Voltage, port 0, ALE, PSEN (6)

0.7 VCC

VOH Output High Voltage, ports 1, 2, 3

0.9 VCC

VOH1 Output High Voltage, port 0, ALE, PSEN

0.9 VCC

IIL

Logical 0 Input Current ports 1, 2 and 3

ILI

Input Leakage Current

ITL Logical 1 to 0 Transition Current, ports 1, 2, 3

RRST RST Pulldown Resistor

50

CIO Capacitance of I/O Buffer

IPD Power Down Current

ICC

Power Supply Current (7)

Active Mode 16MHz

Idle Mode 16MHz

Typ

90 (5)

TBD (5)

TBD (5)

TBD (5)

Max

Unit Test Conditions

0.2 VCC – 0.1 V

VCC + 0.5

V

VCC + 0.5

0.45

0.45

V

V IOL = 0.8mA(4)

V IOL = 1.6mA(4)

V IOH = –10µA

V IOH = –40µA

–50

µA Vin = 0.45V

±10

µA 0.45 < Vin < VCC

–650

µA Vin = 2.0V

200

kΩ

10

TBD

pF fc = 1MHz, TA = 25°C

µA VCC = 2.0V to 5.5V(3)

TBD

TBD

mA VCC = 3.3V(1)

mA VCC = 3.3V(2)

Notes for DC Electrical Characteristics

1. Operating ICC is measured with all output pins disconnected; XTAL1 driven with TCLCH, TCHCL = 5 ns (see Figure 13), VIL = VSS + 0.5V,

VIH = VCC – 0.5V; XTAL2 N.C.; EA = RST = Port 0 = VCC. ICC would be slightly higher if a crystal oscillator used (see NO TAG).

2. Idle ICC is measured with all output pins disconnected; XTAL1 driven with TCLCH, TCHCL = 5ns, VIL = VSS + 0.5V, VIH = VCC–0.5V; XTAL2

N.C; Port 0 = VCC; EA = RST = VSS (see Figure 11).

3. Power Down ICC is measured with all output pins disconnected; EA = VSS, PORT 0 = VCC; XTAL2 NC.; RST = VSS (see NO TAG).

4. Capacitance loading on Ports 0 and 2 may cause spurious noise pulses to be superimposed on the VOLs of ALE and Ports 1 and 3. The noise is due

to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins make 1 to 0 transitions during bus operation. In the worst

cases (capacitive loading 100pF), the noise pulse on the ALE line may exceed 0.45V with maxi VOL peak 0.6V. A Schmitt Trigger use is not neces-

sary.

5. Typicals are based on a limited number of samples and are not guaranteed. The values listed are at room temperature and 5V.

6. Under steady state (non–transient) conditions, IOL must be externally limited as follows:

Maximum IOL per port pin:

10 mA

Maximum IOL per 8–bit port:

Port 0:

26 mA

Ports 1, 2 and 3: 15 mA

Maximum total IOL for all output pins: 71 mA

If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test condi-

tions.

7. For other values, please contact your sales office.

16

MATRA MHS

Rev. C – 10 Sept 1997

Preliminary

Share Link: