68HC05JB3 查看數據表（PDF） - Freescale Semiconductor
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68HC05JB3 Datasheet PDF : 134 Pages
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Freescale Semiconductor, Inc.
November 5, 1998 GENERAL RELEASE SPECIFICATION
Section
TABLE OF CONTENTS
Page
SECTION 14
MECHANICAL SPECIFICATIONS
14.1 20-PIN PDIP (CASE 738) .............................................................................. 14-1
14.2 28-PIN PDIP (CASE 710) .............................................................................. 14-1
14.3 20-PIN SOIC (CASE 751D) ........................................................................... 14-2
14.4 28-PIN SOIC (CASE 751F)............................................................................ 14-2
APPENDIX A
MC68HC705JB3
A.1 INTRODUCTION..............................................................................................A-1
A.2 MEMORY .........................................................................................................A-1
A.3 MASK OPTION REGISTER (MOR) .................................................................A-1
A.4 BOOTSTRAP MODE .......................................................................................A-3
A.5 EPROM PROGRAMMING ...............................................................................A-3
A.5.1 EPROM Program Control Register (PCR)...................................................A-3
A.5.2 Programming Sequence ..............................................................................A-4
A.6 EPROM PROGRAMMING SPECIFICATIONS ................................................A-5
MC68HC05JB3
REV 1
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