MAX3421E(2006) 查看數據表（PDF） - Maxim Integrated
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MAX3421E Datasheet PDF : 29 Pages
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USB Peripheral/Host Controller
with SPI Interface
3.3V
REGULATOR
MAX6349TL
4.7µF
1.0µF
CERAMIC
0.1µF
12MHz
CXI
CXO
VCC VL
XI XO
RES
VBUS
33Ω
INT
MOSI
D+
D+
USB
MISO
µP
"B" CONNECTOR
33Ω
MAX3421E
SCLK
D-
D-
SS
GND
VBCOMP
GND
GPIN GPOUT
GPI
8
8
GPIO
Figure 19. MAX3421E in a Bus-Powered Peripheral Application
CLOAD: 18pF (max)
CO: 7pF (max)
Drive level: 200µW
Series resonance resistance: 60Ω (max)
Note: Series resonance resistance is the resistance
observed when the resonator is in the series resonant
condition. This is a parameter often stated by quartz crys-
tal vendors and is called R1. When a resonator is used in
the parallel resonant mode with an external load capaci-
tance, as is the case with the MAX3421E oscillator circuit,
the effective resistance is sometimes stated. This effec-
tive resistance at the loaded frequency of oscillation is:
R1 x ( 1 + (CO / CLOAD))2
For typical CO and CLOAD values, the effective resis-
tance can be greater than R1 by a factor of 2.
MAX3421E in a Bus-Powered Peripheral
Application
Figure 19 depicts the MAX3421E in a peripheral device
that is powered by VBUS. This configuration is advanta-
geous because it requires no external power supply.
VBUS is specified from 4.75V to 5.25V, requiring a 3.3V
regulator to power the MAX3421E. This diagram
assumes that the microprocessor is powered by 3.3V
as well, so the VL pin (logic-level reference voltage) is
connected to VCC. Therefore, the GPIOs (general-pur-
pose inputs/outputs) are referenced to 3.3V.
USB is a hot-plug system (VBUS is powered when the
device is plugged in), so it is good design practice to
use a power-on reset circuit to provide a clean reset to
the system when the device is plugged in. The
MAX6349TL serves as an excellent USB regulator,
since it has very low quiescent current and a POR cir-
cuit built in.
Because this design is bus powered, it is not necessary
to test for the presence of VBUS. In this case, the bus
voltage-detection input, VBCOMP, makes an excellent
general-purpose input. The VBCOMP input has two inter-
rupts associated with it, VBUSIRQ and NOVBUSIRQ.
These interrupts can detect both edges of any transitions
on the VBCOMP input.
The configuration in Figure 19 shows the SPI interface
using the maximum number of SPI interface pins. The
data pins, MOSI and MISO, are separate, and the
MAX3421E supplies an interrupt signal through the INT
output pin to the µP to notify the µP when its attention
is required.
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