MAX3873A(2003) 查看數據表（PDF） - Maxim Integrated
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MAX3873A
(Rev.:2003)
(Rev.:2003)
Maxim Integrated
MAX3873A Datasheet PDF : 12 Pages
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Low-Power, Compact 2.5Gbps or 2.7Gbps
Clock-Recovery and Data-Retiming IC
AC ELECTRICAL CHARACTERISTICS
(VCC = 3.0V to 3.6V, CF = 0.022µF, TA = -40°C to +85°C. Typical values are at VCC = 3.3V, 2.488Gbps, TA = +25°C, unless otherwise
noted.) (Note 4)
PARAMETER
Serial Input Data Rate
Clock-to-Q Delay
Jitter Peaking
Jitter Transfer Bandwidth
SYMBOL
tCLK-Q
JP
JBW
CONDITIONS
RATESET = low
RATESET = high
Figure 2 (Note 5)
f ≤ 2MHz
RATESET = Low
f = 70kHz, 0.4UI deterministic jitter
on input data
MIN TYP MAX UNITS
2.488
2.67
Gbps
-70
+70
ps
0.1
dB
2.0 MHz
6.9
f = 100kHz, 0.4UI deterministic jitter
on input data
2.12
4.5
(Notes 6, 8)
f = 1MHz, 0.4UI deterministic jitter
on input data
0.33
0.6
Sinusoidal Jitter Tolerance
f = 10MHz, 0.4UI deterministic jitter
on input data
0.15
0.3
f = 70kHz, 0.4UI deterministic jitter
6.9
on input data
UIP-P
f = 100kHz, 0.4UI deterministic jitter
on input data
2.12
4.5
(Notes 6, 9)
f = 1MHz, 0.4UI deterministic jitter
0.33
0.6
on input data
Jitter Generation
Clock Output Edge
Speed
f = 10MHz, 0.37UI deterministic jitter 0.15
0.3
on input data
JGEN
(Notes 7, 8)
(Notes 7, 9)
5
6.8 mUIRMS
45
62 mUIP-P
6
7.65 mUIRMS
40
86 mUIP-P
20% to 80%
60
110
ps
Data Output Edge
Speed
20% to 80%
60
110
ps
Tolerated Consecutive
Identical Digits
SDI± Input Return Loss
(-20log(S11))
Frequency Acquisition
Time
LOL Assert Time
100kHz to 2.5GHz
2.5GHz to 4.0GHz
Figure 4
Figure 4
2000
bits
17
dB
14
1
ms
1.6
µs
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