MSM80C31 查看數據表（PDF） - Oki Electric Industry

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MSM80C31

CMOS 8-Bit Microcontroller

Oki Electric Industry 

¡ Semiconductor

MSM80C31F/80C51F

External Data Memory Access AC Characteristics 2

(VCC = 2.5 to 4.0 V, VSS = 0 V, Ta = –40°C to +85°C; load capacitance for Port 0, ALE, and PSEN =

100 pF ; load capacitance for all other outputs = 80 pF)

Parameter

Symbol

XTAL1, XTAL2 Oscillation Cycle

ALE Single Width

Adderss Setup Time

(to ALE Falling Edge)

Adderss Hold Time

(from ALE Falling Edge)

RD Single Width

WR Single Width

RAM Data Read Time

(from RD Single Falling Edge)

RAM Data Read Hold Time

(from RD Single Rising Edge)

Data Bus Floating Time

(from RD Single Rising Edge)

RAM Data Read Time

(from ALE Single Falling Edge)

RAM Data Read Time

(from Address Output)

RD/WR Output Time from

ALE Falling Edge

RD/WR Output Time from

Address Output

RD Output Time from Data Output

Time from Data Output to

WR Rising Edge

Data Hold Time (WR Rising Edge)

Time from RD Output to

Address Float

Time from RD/WR Rising

Edge to ALE Rising Edge

tCLCL

tLHLL

tAVLL

tLLAX

tRLRH

tWLWH

tRLDV

tRHDX

tRHDZ

tLLDV

tAVDV

tLLWL

tAVWL

tQVWX

tQVWH

tWHQX

tRLAZ

tWHLH

12 MHz Clock

Min.

—

126

43

Max.

—

—

—

48

—

400

—

400

—

—

251

0

—

Variable Clock

See Guaranteed

Operating Range

Min.

62.5

2tCLCL – 40

1tCLCL – 40

Max.

—

—

—

Unit

ns

ns

ns

1tCLCL – 35

—

ns

6tCLCL – 100

—

ns

6tCLCL – 100

—

ns

—

5tCLCL – 165 ns

0

—

ns

—

96

—

2tCLCL – 70 ns

—

516

—

8tCLCL – 150 ns

—

585

—

9tCLCL – 165 ns

150

300

3tCLCL – 100 3tCLCL + 50

ns

203

—

4tCLCL – 130

—

ns

23

—

1tCLCL – 60

—

ns

433

—

7tCLCL – 150

—

ns

33

—

1tCLCL – 50

—

ns

—

0

—

0

ns

43

183

1tCLCL – 40 1tCLCL + 100 ns

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