L5955 查看數據表（PDF） - STMicroelectronics
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L5955 Datasheet PDF : 17 Pages
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Functional description
Figure 7. Definition of timing on the I2C Bus.
L5955
SDA
tBUP
tLOW
tR
SCL
P
tHD;DAT
tHD;DAT
S
tHIGH
tF
tHD;STA
tSP
tSU;DAT
tSU;STA
Sr
D99AU1007
tSU;STO
P
Figure 8. Typical application circuit
VBAT1 19
VBAT2
23
VBAT3_1 5
VBAT3_2 25
T.B.D.
EN 7
SCL 21
SDA 2
Cslew
9
MRSTDLY 15
0.1μF
LVW 13
STBY1
VBAT1
T.B.D.
T.B.D.
10K
MRST 17
11
LVW_IN
18 STBY1
20 STBY2
REG1
12
REG2
10
REG3
24
REG4
26
REG5
16
22 REG6
4
HSD1
6 HSD2
8 HSD3
8 x 10μF
14
GND
3
PGND
1
TAB1
27
TAB2
3.1
Write mode:
S
MSB
Chip address
0
LSB
A
MSB
Data byte
A .. .. P
LSB
S = START condition - SDA goes from high to low while SCL is high
A = Acknowledge - the device being written to, pulls down on data line (SDA) during the
acknowledge clock pulse.
P = STOP condition - SDA goes from low to high while SCL is high.
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