MCP3004/3008
CS
CLK
tSUCS
tCYC
tCSH
tCYC
DIN
DOUT
Start
D2 D1 D0
SGL/
DIFF
HI-Z
Don’t Care
Null
Bit
B9
B8
B7
B6
B5
B4
B3
B2
B1 B0 *
Start
D2
SGL/
DIFF
HI-Z
tSAMPLE
tCONV
tDATA **
* After completing the data transfer, if further clocks are applied with CS low, the A/D converter will output LSB
first data, then followed with zeros indefinitely. See Figure 5-2 below.
** tDATA: during this time, the bias current and the comparator powers down while the reference input becomes
a high-impedance node.
FIGURE 5-1:
Communication with the MCP3004 or MCP3008.
CS
CLK
tSUCS
tCYC
Power Down
tCSH
DIN
DOUT
Start
D2 D1 D0
Don’t Care
SGL/
DIFF
HI-Z
Null
Bit
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9*
HI-Z
(MSB)
tSAMPLE
tCONV
tDATA **
* After completing the data transfer, if further clocks are applied with CS low, the A/D converter will output zeros
indefinitely.
** tDATA: During this time, the bias circuit and the comparator powers down while the reference input becomes
a high-impedance node, leaving the CLK running to clock out LSB first data or zeroes.
FIGURE 5-2:
Communication with MCP3004 or MCP3008 in LSB First Format.
DS21295D-page 20
© 2008 Microchip Technology Inc.