GS881E18AT-250 查看數據表（PDF） - Giga Semiconductor

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GS881E18AT-250

512K x 18, 256K x 36 9Mb Sync Burst SRAMs

Giga Semiconductor 

Preliminary

GS881E18/36AT-250/225/200/166/150/133

Pipelined DCD Read-Write Cycle Timing

CK

ADSP

Single Read

Single Write

tKL

Burst Read

tS tH

tKH

tKC

ADSP is blocked by E1 inactive

tS tH ADSC initiated read

ADSC

tS tH

ADV

A0–An

GW

tS tH

RD1

tS tH

tS

WR1

RD2

tH

BW

tS tH

BA–BD

E1

tS tH

WR1

E1 masks ADSP

G

Hi-Z

DQA–DQD

tOE tOHZ

tKQ

Q1A

tS tH

D1A

Q2A

Q2B

Q2c Q2D

Rev: 1.01 3/2002

21/34

© 2001, Giga Semiconductor, Inc.

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

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