74AHC595 查看數據表（PDF） - Philips Electronics
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产品描述 (功能)
生产厂家
74AHC595
Philips Electronics
74AHC595 Datasheet PDF : 20 Pages
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Philips Semiconductors
8-bit serial-in/serial or parallel-out shift
register with output latches; 3-state
Product specification
74AHC595; 74AHCT595
AC CHARACTERISTICS
Type 74AHC595
GND = 0 V; tr = tf ≤ 3.0 ns.
SYMBOL
PARAMETER
TEST CONDITIONS
WAVEFORMS CL
MIN.
25
TYP.
Tamb (°C)
−40 to +85
−40 to +125 UNIT
MAX. MIN. MAX. MIN. MAX.
VCC = 3.0 to 3.6 V; note 1
tPHL/tPLH
tPHL
tPZH/tPZL
tPHZ/tPLZ
tPHL/tPLH
tPHL
tPZH/tPZL
tPHZ/tPLZ
tW
propagation delay
SHCP to Q7’
propagation delay
STCP to Qn
propagation delay
MR to Q7’
3-state output enable
time OE to Qn
3-state output disable
time OE to Qn
propagation delay
SHCP to Q7’
propagation delay
STCP to Qn
propagation delay
MR to Q7’
3-state output enable
time OE to Qn
3-state output disable
time OE to Qn
shift clock pulse width
HIGH or LOW
see Figs 7
and 12
see Figs 8
and 12
see Figs 10
and 12
see Figs 11
and 12
see Figs 7
and 12
see Figs 8
and 12
see Figs 10
and 12
see Figs 11
and 12
see Figs 7
and 12
15 pF −
5.7
−
5.9
−
5.9
−
5.6
−
5.4
50 pF −
7.7
−
7.7
−
7.4
−
7.4
−
8.7
5.0 −
13.0 1.0 15.0 1.0
11.9 1.0 13.5 1.0
12.8 1.0 13.7 1.0
11.5 1.0 13.5 1.0
11.0 1.0 13.0 1.0
16.5 1.0 18.5 1.0
15.4 1.0 17.0 1.0
16.3 1.0 17.2 1.0
15.0 1.0 17.0 1.0
15.7 1.0 16.2 1.0
−
5.0 −
5.0
storage clock pulse see Figs 8
width HIGH or LOW and 12
5.0 −
−
5.0 −
5.0
master reset pulse
width LOW
see Figs 10
and 12
5.0 −
−
5.0 −
5.0
tsu
set-up time
DS to SHCP
see Figs 8
and 12
set-up time
see Figs 9
SHCP to STCP
and 12
th
hold time
DS to SHCP
trem
removal time
MR to SHCP
see Figs 10
and 12
fmax
maximum clock pulse see Figs 7, 8
frequency
and 12
SHCP or STCP
3.5 −
−
3.5 −
3.5
8.5 −
−
8.5 −
8.5
1.5 −
−
1.5 −
1.5
3.0 −
−
3.0 −
3.0
80 125 −
60 −
40
16.5 ns
15.0 ns
15.0 ns
15.0 ns
14.5 ns
20.1 ns
18.5 ns
18.7 ns
18.5 ns
17.5 ns
−
ns
−
ns
−
ns
−
ns
−
ns
−
ns
−
ns
−
MHz
2000 Mar 15
10
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