N74F112N 查看數據表（PDF） - Philips Electronics

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N74F112N

Dual J-K negative edge-triggered flip-flop

Philips Electronics 

Philips Semiconductors

Dual J-K negative edge-triggered flip-flop

Product specification

74F112

Jn, Kn

SDn VM

tw(L)

CPn

VM

tREC

VM

tPLH

Qn

VM

tPHL

Qn

VM

SF00108

Waveform 2. Propagation Delay for Set to Output, Set Pulse Width, and Recovery Time for Set to Clock

Jn, Kn

RDn VM

CPn

Qn

Qn

tw(L)

VM

tREC

VM

tPHL

VM

tPLH

VM

SF00109

Waveform 3. Propagation Delay for Reset to Output, Reset Pulse Width, and Recovery Time for Reset to Clock

February 9, 1990

6

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