74LVC1G38GW 查看數據表（PDF） - NXP Semiconductors.
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74LVC1G38GW Datasheet PDF : 15 Pages
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NXP Semiconductors
74LVC1G38
2-input NAND gate; open drain
6. Pinning information
6.1 Pinning
74LVC1G38
74LVC1G38
A1
6 VCC
A1
B2
GND 3
5 VCC
4Y
001aab718
B2
5 n.c.
GND 3
4Y
001aab832
Transparent top view
Fig 4. Pin configuration SOT353-1 Fig 5. Pin configuration SOT886
and SOT753
74LVC1G38
A1
B2
6 VCC
5 n.c.
GND 3
4Y
001aaf180
Transparent top view
Fig 6. Pin configuration SOT891
6.2 Pin description
Table 3.
Symbol
A
B
GND
Y
n.c.
VCC
Pin description
Pin
SOT353-1/SOT753
1
2
3
4
-
5
7. Functional description
SOT886/SOT891
1
2
3
4
5
6
Description
data input
data input
ground (0 V)
data output
not connected
supply voltage
Table 4. Function table[1]
Input
A
B
L
L
L
H
H
L
H
H
[1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF state
Output
Y
Z
Z
Z
L
74LVC1G38_3
Product data sheet
Rev. 03 — 27 August 2007
© NXP B.V. 2007. All rights reserved.
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