AD7960BCPZ-RL7(Rev0) 查看數據表（PDF） - Analog Devices

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AD7960BCPZ-RL7
(Rev.:Rev0)

18-Bit, 5 MSPS PulSAR Differential ADC

Analog Devices 

AD7960

Data Sheet

Timing Diagrams

CNV–

CNV+

SAMPLE N

tCNVH

tCYC

SAMPLE N + 1

tACQ

ACQUISITION

tCLK

CLK–

CLK+

DCO–

tDCO

DCO+

D+

tCLKD

D–

17 18

ACQUISITION

1

2

tCLKL

17 18

ACQUISITION

1

2

3

17 18

1

2

17 18

tMSB

D1 D0

N–1 N–1

0

tD

D17

D16

N

N

D1 D0

N

N

0

Figure 2. Echoed Clock Interface Mode Timing Diagram

1

2

3

D17

N+1

D16 D15

N+1 N+1

SAMPLE N

tCNVH

tCYC

SAMPLE N + 1

CNV–

CNV+

tACQ

ACQUISITION

CLK–

CLK+

tCLKD

D+

D–

tCLK

19 20

ACQUISITION

tCLKL

1

2

3

4

19 20

ACQUISITION

1

2

tMSB

D1

N–1

D0

N–1

1

D17 D16

N

N

D1

D0

N

N

1

Figure 3. Self Clocked Interface Mode Timing Diagram

3

D17

N+1

Rev. 0 | Page 6 of 24

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