Data Sheet
AD9714/AD9715/AD9716/AD9717
DIGITAL SPECIFICATIONS
TMIN to TMAX, AVDD = 3.3 V, DVDD = 1.8 V, DVDDIO = 3.3 V, CVDD = 3.3 V, IxOUTFS = 2 mA, maximum sample rate, unless
otherwise noted.
Table 2.
Parameter
DAC CLOCK INPUT (CLKIN)
VIH
VIL
Maximum Clock Rate
SERIAL PERIPHERAL INTERFACE
Maximum Clock Rate (SCLK)
Minimum Pulse Width High
Minimum Pulse Width Low
INPUT DATA
1.8 V Q Channel or DCLKIO Falling Edge
Setup
Hold
1.8 V I Channel or DCLKIO Rising Edge
Setup
Hold
3.3 V Q Channel or DCLKIO Falling Edge
Setup
Hold
3.3 V I Channel or DCLKIO Rising Edge
Setup
Hold
VIH
VIL
Min
Typ
Max
Unit
2.1
3
0
V
0.9
V
125
MSPS
25
MHz
20
ns
20
ns
0.25
ns
1.2
ns
0.13
ns
1.1
ns
−0.2
ns
1.5
ns
−0.2
ns
1.6
ns
2.1
3
V
0
0.9
V
Rev. B | Page 7 of 80