AD9915BCPZ 查看數據表（PDF） - Analog Devices
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AD9915BCPZ Datasheet PDF : 47 Pages
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Data Sheet
2
CH2 1.0V Ω
M20.00ms 5.0GS/s IT 40.0ps/pt
A CH2 1.64V
Figure 22. SYNC_OUT (fSYSCLK/384)
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
500
1000
1500
2000
2500
SYSTEM CLOCK RATE (MHz)
Figure 23. DAC Calibration Time vs. SYSCLK Rate. See the DAC Calibration
Output section for formula.
AD9915
930
920
910
900
890
880
870
–6
–4
–2
0
2
4
6
TIME (ms)
Figure 24. Measured Rising Linear Frequency Sweep
930
920
910
900
890
880
870
–6
–4
–2
0
2
4
6
TIME (ms)
Figure 25. Measured Falling Linear Frequency Sweep
Rev. F | Page 15 of 47
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