AD9980 查看數據表（PDF） - Analog Devices

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AD9980

High Performance 8-Bit Display Interface

Analog Devices 

AD9980

TABLE OF CONTENTS

Analog Interface specifications....................................................... 3

Electrical Characteristics ............................................................. 3

Absolute Maximum Ratings............................................................ 5

Explanation of Test Levels........................................................... 5

ESD Caution.................................................................................. 5

Pin Configuration and Function Descriptions............................. 6

Design Guide................................................................................... 10

General Description................................................................... 10

Digital Inputs .............................................................................. 10

Input Signal Handling................................................................ 10

Hsync and Vsync Inputs............................................................ 10

Serial Control Port ..................................................................... 10

Output Signal Handling............................................................. 10

Clamping ..................................................................................... 10

Gain and Offset Control............................................................ 11

Timing Diagrams........................................................................ 19

Hsync Timing ............................................................................. 20

Coast Timing............................................................................... 20

Output Formatter ....................................................................... 20

Two-Wire Serial Register Map...................................................... 22

Detailed 2-Wire Serial Control Register Descriptions .............. 28

Chip Identification ..................................................................... 28

PLL Divider Control .................................................................. 28

Clock Generator Control .......................................................... 28

Phase Adjust................................................................................ 29

Input Gain ................................................................................... 29

Input Offset ................................................................................. 29

Hsync Controls ........................................................................... 29

Vsync Controls ........................................................................... 30

Coast and Clamp Controls........................................................ 31

SOG Control ............................................................................... 33

Input and Power Control........................................................... 33

Output Control ........................................................................... 34

Sync Processing .......................................................................... 35

Detection Status.......................................................................... 36

Polarity Status ............................................................................. 36

Hsync Count ............................................................................... 37

Two-Wire Serial Control Port....................................................... 38

Data Transfer via Serial Interface............................................. 38

PCB Layout Recommendations ............................................... 40

PLL ............................................................................................... 40

Outline Dimensions ....................................................................... 42

Ordering Guide .......................................................................... 42

REVISION HISTORY

1/05—Initial Version: Revision 0

Rev. 0 | Page 2 of 44

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