ADP3418KRZ 查看數據表（PDF） - ON Semiconductor

零件编号

产品描述 (功能)

生产厂家

ADP3418KRZ

Dual Bootstrapped, 12 V MOSFET Driver with Output Disable

ON Semiconductor 

ADP3418

APPLICATION INFORMATION

SUPPLY CAPACITOR SELECTION

For the supply input (VCC) of the ADP3418, a local bypass

capacitor is recommended to reduce the noise and to supply

some of the peak currents drawn, such as a 4.7 µF, low ESR

capacitor. Multilayer ceramic chip (MLCC) capacitors provide

the best combination of low ESR and small size. Keep the

ceramic capacitor as close as possible to the ADP3418.

BOOTSTRAP CIRCUIT

The bootstrap circuit uses a charge storage capacitor (CBST) and

a diode, as shown in Figure 1. These components can be selected

after the high-side MOSFET is chosen. The bootstrap capacitor

must have a voltage rating that is able to handle twice the

maximum supply voltage. A minimum 50 V rating is

recommended. The capacitor values are determined by:

C BST1

+ C BST2

= 10 ×

QGATE

VGATE

(1)

CBST1

= VGATE

(2)

CBST1 + CBST2 VCC − VD

where:

QGATE is the total gate charge of the high-side MOSFET at VGATE.

VGATE is the desired gate drive voltage (usually in the 5 V to 10 V

range, 7 V being typical).

VD is the voltage drop across D1.

Rearranging Equation 1 and Equation 2 to solve for CBST1 yields

C

BST1 =

10

×

QGATE

VCC − VD

CBST2 can then be found by rearranging Equation 1 as

C BST2

= 10 × QGATE

VGATE

− CBST1

For example, an NTD60N02 has a total gate charge of

approximately 12 nC at VGATE = 7 V. Using VCC = 12 V and

VD = 1 V, one finds CBST1 = 12 nF and CBST2 = 6.8 nF. Good

quality ceramic capacitors should be used.

RBST is used for slew rate limiting to minimize the ringing at the

switch node. It also provides peak current limiting through D1.

An RBST value of 1.5 Ω to 2.2 Ω is a good choice. The resistor

needs to be able to handle at least 250 mW due to the peak

currents that flow through it.

A small signal diode can be used for the bootstrap diode due to

the ample gate drive voltage supplied by VCC. The bootstrap

diode must have a minimum 15 V rating to withstand the

maximum supply voltage. The average forward current is

estimated by

I F(AVG) = QGATE × f MAX

(3)

where fMAX is the maximum switching frequency of the con-

troller. The peak surge current rating is calculated by

I F(PEAK )

=

VCC − VD

RBST

(4)

MOSFET SELECTION

When interfacing the ADP3418 to external MOSFETs, there are

a few considerations that the designer should be aware of. These

help make a more robust design that minimizes stresses on both

the driver and MOSFETs. These stresses include exceeding the

short-time duration voltage ratings on the driver pins as well as

the external MOSFET.

It is also highly recommended to use the Boot-Snap circuit to

improve the interaction of the driver with the characteristics of

the MOSFETs. If a simple bootstrap arrangement is used, make

sure to include a proper snubber network on the SW node.

HIGH-SIDE (CONTROL) MOSFETS

The high-side MOSFET is usually high speed to minimize

switching losses (see any ADI Flex-Mode™1 controller data sheet

for more details on MOSFET losses). This usually implies a low

gate resistance and a low input capacitance/charge device. Yet,

there is also a significant source lead inductance that can exist.

This depends mainly on the MOSFET package; it is best to

contact the MOSFET vendor for this information.

The ADP3418 DRVH output impedance and the input resistance

of the MOSFETs determine the rate of charge delivery to the

gate’s internal capacitance, which determines the speed at which

the MOSFETs turn on and off. However, due to potentially large

currents flowing in the MOSFETs at the on and off times (this

current is usually larger at turn off due to ramping up of the

output current in the output inductor), the source lead inductance

generates a significant voltage across it when the high-side

MOSFETs switch off. This creates a significant drain-source

voltage spike across the internal die of the MOSFETs and can

lead to a catastrophic avalanche. The mechanisms involved in

this avalanche condition can be referenced in literature from the

MOSFET suppliers.

1 Flex-Mode is protected by U.S. Patent 6,683,441.

Rev. 6 | Page 10 of 13 | www.onsemi.com

Share Link: