AT45DB161D-CU 查看數據表（PDF） - Atmel Corporation
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AT45DB161D-CU Datasheet PDF : 56 Pages
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address lines and a parallel interface, the DataFlash uses a RapidS serial interface to sequen-
tially access its data. The simple sequential access dramatically reduces active pin count,
facilitates hardware layout, increases system reliability, minimizes switching noise, and reduces
package size. The device is optimized for use in many commercial and industrial applications
where high-density, low-pin count, low-voltage and low-power are essential.
To allow for simple in-system reprogrammability, the AT45DB161D does not require high input
voltages for programming. The device operates from a single power supply, 2.5V to 3.6V or 2.7V
to 3.6V, for both the program and read operations. The AT45DB161D is enabled through the
chip select pin (CS) and accessed via a three-wire interface consisting of the Serial Input (SI),
Serial Output (SO), and the Serial Clock (SCK).
All programming and erase cycles are self-timed.
2. Pin Configurations and Pinouts
Figure 2-1. TSOP Top View: Type 1
RDY/BUSY 1
RESET 2
WP 3
NC 4
NC 5
VCC 6
GND 7
NC 8
NC 9
NC 10
CS 11
SCK 12
SI 13
SO 14
Figure 2-3. MLF (VDFN) Top View
SI 1
SCK 2
RESET 3
CS 4
8 SO
7 GND
6 VCC
5 WP
28 NC
27 NC
26 NC
25 NC
24 NC
23 NC
22 NC
21 NC
20 NC
19 NC
18 NC
17 NC
16 NC
15 NC
Figure 2-2.
BGA Package Ball-out
(Top View)
12 3 4 5
A
NC
NC
NC
NC
B
NC SCK GND VCC NC
C
NC CS RDY/BSY WP NC
D
NC SO
SI RESET NC
E
NC NC
NC
NC
NC
Figure 2-4. SOIC Top View
SI 1
SCK 2
RESET 3
CS 4
8 SO
7 GND
6 VCC
5 WP
Note: 1. The metal pad on the bottom of the MLF package is floating. This pad can be a “No Connect” or connected to GND.
2 AT45DB161D
3500M–DFLASH–04/09
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