ATC18M 查看數據表（PDF） - Atmel Corporation

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ATC18M

0.18 µm CMOS Cell-based ASIC for Military Use

Atmel Corporation 

Input/Output Pad Cell

Libraries

IO18lib and IO33lib

The Atmel Input/Output Cell Library, IO18lib, contains a comprehensive list of input, out-

put, bi-directional and tri-state cells. The ATC18M (1.8V) cell library includes one special

sets of I/O cells, IO25lib and IO33lib, for interfacing with external 3.3V devices.

They will encompass the following types of cells:

• Bi-directional

• Tri-state outport

• Outputs

• Inputs

• PCI

• PECL

• LVDS (EIA-644)

All buffers will be capable of being used as “Cold Sparing” Buffers.

Compiled Memories

Based on Virage Logic Memory Compilers, for synchronized memories. Its maximum

memory size compilation capability is:

SRAM

DPRAM

TPSF

16K x 32 bits

8K x 32 bits

1K x 16 bits

A set of EDAC can be used in combination with these memories so as to alleviate their

SEU susceptibility.

Synthesized Memory

The synthesis of memories is based on Atmel GENESYS within the GATEAID software.

It must be used only for small memories and when SEU hardened cells are needed.

The maximum memory sizes are as follows:

RAM

TPRAM

DPRAM

4K bits

4K bits

2K bits

4 ATC18M

4262A–AERO–07/03

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