Data Sheet
General Description
The CLC2005 is a single supply, general purpose, voltage-
feedback amplifier fabricated on a complementary bipolar
process using a patent pending topography. It features a
rail-to-rail output stage and is unity gain stable. Both gain
bandwidth and slew rate are insensitive to temperature.
The common mode input range extends to 300mV below
ground and to 1.2V below Vs. Exceeding these values
will not cause phase reversal. However, if the input volt-
age exceeds the rails by more than 0.5V, the input ESD
devices will begin to conduct. The output will stay at the
rail during this overdrive condition.
The design uses a Darlington output stage. The output
stage is short circuit protected and offers “soft” saturation
protection that improves recovery time.
The typical circuit schematic is shown in Figure 1.
+Vs
6.8μF
+
+In1
0.1μF
+
1/2
CLC2005
-
Rf
Rg
Out1
G=2
RL = 2kΩ
Vs = +5V
Rf = 2kΩ
Rf = 1kΩ
1
10
100
Frequency (MHz)
Figure 2: Frequency Response vs. Rf
Power Dissipation
The maximum internal power dissipation allowed is directly
related to the maximum junction temperature. If the
maximum junction temperature exceeds 150°C, some
reliability degradation will occur. If the maximum junction
temperature exceeds 175°C for an extended time, device
failure may occur.
The CLC2005 is short circuit protected. However, this may
not guarantee that the maximum junction temperature
(+150°C) is not exceeded under all conditions. Follow the
maximum power derating curves shown in Figure 3 to
ensure proper operation.
2.0
1.5
Figure 1: Typical Configuration
At non-inverting gains other than G = +1, keep Rg below
1kΩ to minimize peaking; thus, for optimum response at a
gain of +2, a feedback resistor of 1kΩ is recommended.
Figure 2 illustrates the CLC2005 frequency response with
both 1kΩ and 2kΩ feedback resistors.
SOIC-8 lead
1.0
0.5
0
-50 -30 -10 10 30 50 70 90
Ambient Temperature ( C)
Figure 3: Power Derating Curves
Overdrive Recovery
For an amplifier, an overdrive condition occurs when the
output and/or input ranges are exceeded. The recovery
time varies based on whether the input or output is over-
driven and by how much the ranges are exceeded. The
CLC2005 will typically recover in less than 20ns from an
overdrive condition. Figure 4 shows the CLC2005 in an
overdriven condition.
©2004-2009 CADEKA Microcircuits LLC
www.cadeka.com 10