CY8C5248PVI-028 查看數據表（PDF） - Cypress Semiconductor

零件编号

产品描述 (功能)

生产厂家

CY8C5248PVI-028

Programmable System-on-Chip (PSoC®)

Cypress Semiconductor 

PRELIMINARY

PSoC®5: CY8C52 Family Data Sheet

EM_ Addr

EM_ CEn

Figure 11-2. Asynchronous Write Cycle Timing

Taddrv

Address

Taddrh

Tcel

EM_ OEn

Twev

Twel

EM_ Data

Tdcev

Data

Table 11-44. Asynchronous Write Cycle Specifications

Parameter

Description

T

EMIF Clock period

Taddrv EM_CEn low to EM_Addr valid

Taddrh Address hold time after EM_WEn high

Tcel

EM_CEn low time

Twev

Twel

Tweh

Tdcev

Tdweh

EM_CEn low to EM_WEn low

EM_WEn low time

EM_WEn high to EM_CEn high hold time

EM_CEn low to data valid

Data hold time after EM_WEn high

Conditions

Tweh

Tdweh

Min

Typ

Max

Units

30.3

-

-

ns

-

-

5

ns

T+2

-

-

ns

2*T-1

-

2*T+2

ns

-5

-

5

ns

T-1

-

T+2

ns

T

-

-

ns

-

-

7

ns

T

-

-

ns

Document Number: 001-55034 Rev. *A

Page 71 of 85

[+] Feedback

Share Link: