CY8C5248PVI-028 查看數據表（PDF） - Cypress Semiconductor
零件编号
产品描述 (功能)
生产厂家
CY8C5248PVI-028 Datasheet PDF : 85 Pages
| |||
PRELIMINARY
PSoC®5: CY8C52 Family Data Sheet
11.9.5 External Clock Reference
Table 11-62. External Clock Reference AC Specifications[9]
Parameter
Description
External frequency range
Input duty cycle range
Input edge rate
Conditions
Measured at Vddio/2
Vil to Vih
11.9.6 Phase-Locked Loop
Table 11-63. PLL DC Specifications
Parameter
Description
Idd
PLL operating current
Conditions
FREF = 3 MHz, FVCO=24 MHz
Table 11-64. PLL AC Specifications
Parameter
Description
Fpllinpre PLL prescaler input frequency
Fpllin
PLL input frequency
Fpllout
PLL output frequency
Lock time at startup
Jperiod-rms Jitter (rms)[9]
PLL output duty cycle
Conditions
All PLL output frequencies
Min
Typ
0
-
30
50
0.1
-
Min
Typ
-
560
Min
Typ
1
-
1
-
24
-
-
-
-
-
45
-
Max Units
33
MHz
70
%
-
V/ns
Max Units
-
µA
Max Units
48
MHz
3
MHz
80
MHz
250
µs
250
ps
55
%
Document Number: 001-55034 Rev. *A
Page 78 of 85
[+] Feedback
Share Link: 