1.2 PIN DESCRIPTIONS (Continued)
PIN NUMBER
NAME
23
F
26, 27, 28, 29,
30-34, 65, 66,
67,
71-75,
35
36
NC
TN
OEN
64, 63, 62, 61,
60, 57 56, 55,
54, 53, 52, 49,
48, 45, 44, 43,
42, 41, 40, 39
70
DATA_OUT[19:0]
TEST
103,104,105,
106, 107, 108,
111, 112, 113,
114
117, 118, 119,
120, 121, 122,
123, 124, 125,
126
DATA_IN [19:10]
(LUMA channel)
DATA_IN [9:0]
(CHROMA channel)
TIMING
Synchronous
wrt PCLK_IN
N/A
N/A
Non-
synchronous
Synchronous
wrt PCLK_IN
N/A
Synchronous
wrt PCLK_IN
Synchronous
wrt PCLK_IN
TYPE
Input
DESCRIPTION
Control Signal Input. This signal indicates the ODD/EVEN field
of the input video data streams. Refer to Figure 4 for required
timing of F relative to LUMA (DATA_IN[19:10]) and CHROMA
(DATA_IN[9:0]). When the input video format is progressive
scan, F should remain low at all times.
No Connect. Do not connect these pins.
TEST
Input
Outputs
Test pin. Used for test purposes only. This pin must be
connected to VDD for normal operation.
Control Signal Input. Used to enable the DATA_OUT[19:0]
output bus or set it to a high Z state. When OEN is low, the
DATA_OUT[19:0] bus is enabled. When OEN is high, the
DATA_OUT[19:0] bus is disabled and in a high Z state.
Output Data Bus. The device generates a 20 bit wide data
stream running at 74.25 (or 74.25/1.001) MHz. DATA_OUT[19]
is the MSB and DATA_OUT[0] is the LSB.
TEST
Input
Test Pin. Used for test purposes only. This pin must be
connected to GND for normal operation.
Input Data Bus. LUMA CHANNEL. DATA_IN [19] is the MSB of
the LUMA input signal (pin 103). DATA_IN [10] is the LSB of the
LUMA input signal (pin 114).
Input
CHROMA Input Data Bus. CHROMA CHANNEL DATA_IN [9] is
the MSB of the CHROMA signal (pin 117). DATA_IN [0] is the
LSB of the CHROMA signal (pin 126).
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