HT9200A(1998) 查看數據表（PDF） - Holtek Semiconductor
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HT9200A Datasheet PDF : 8 Pages
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HT9200A/B
When the system is operating in the serial mode
a pull-high resistor is attached to D0~D3 (for
parallel mode) on the input terminal.
For the HT9200B, the S/P pin has to be connected
low for serial mode operation.
Parallel mode ( HT9200B)
The HT9200B provides four data inputs D0~D3
to generate their corresponding DTMF signals.
The S/P has to be connected high to select the
parallel operation mode. Then the input data
codes should be determined. Finally, the CE is
connected low to transmit the DTMF signal
from the DTMF pin.
The TDE time (about 6ms) will be delayed from the
CE falling edge to the DTMF signal output.
The relationship between the digital codes and
the tone output frequency is illustrated in Table 2.
As for the control timing diagram, see Figure 2.
When the system is operating in the parallel
mode, D0~D3 are all in the floating state. Thus,
these data input pins should not float.
Figure 1
Table 2: Digits vs. input data vs. tone output frequency (parallel mode)
Digit
D3 D2 D1 D0
Tone Output Frequency (Hz)
1
0
0
0
1
697+1209
2
0
0
1
0
697+1336
3
0
0
1
1
697+1477
4
0
1
0
0
770+1209
5
0
1
0
1
770+1336
6
0
1
1
0
770+1477
7
0
1
1
1
852+1209
8
1
0
0
0
852+1336
6
21st Aug ’98
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