HYB39S64160BT-8 查看數據表（PDF） - Infineon Technologies
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HYB39S64160BT-8 Datasheet PDF : 53 Pages
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HYB 39S64400/800/160BT(L)
64-MBit Synchronous DRAM
Functional Block Diagrams
Column Addresses
A0 - A9, AP, BA0, BA1
Row Addresses
A0 - A11, BA0, BA1
Column Address
Counter
Column Address
Buffer
Row Address
Buffer
Refresh Counter
Row Decoder
Memory
Array
Bank 0
4096 x 1024
x 4 Bit
Row Decoder
Memory
Array
Bank 1
4096 x 1024
x 4 Bit
Row Decoder
Memory
Array
Bank 2
4096 x 1024
x 4 Bit
Row Decoder
Memory
Array
Bank 3
4096 x 1024
x 4 Bit
Input Buffer Output Buffer
DQ0 - DQ3
Block Diagram: 4 Bank × 4M × 4 SDRAM
Control Logic &
Timing Generator
SPB03696
Data Book
4
12.99
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