IS62WV10248BLL-55BI 查看數據表（PDF） - Integrated Silicon Solution

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IS62WV10248BLL-55BI

1M x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM

Integrated Silicon Solution 

IS62WV10248BLL

CAPACITANCE(1)

Symbol Parameter

Conditions

Max.

Unit

CIN

Input Capacitance

VIN = 0V

8

pF

COUT

Input/Output Capacitance

VOUT = 0V

10

pF

Note:

1. Tested initially and after any design or process changes that may affect these parameters.

AC TEST CONDITIONS

Parameter

Input Pulse Level

Input Rise and Fall Times

Input and Output Timing

and Reference Level

Output Load

IS62WV10248BLL

(Unit)

0.4 to VDD-0.3V

5 ns

VREF

See Figures 1 and 2

ISSI ®

R1(Ω)

R2(Ω)

VREF

VTM

IS62WV10248BLL

2.5V - 3.6V

1029

1728

1.5V

2.8V

AC TEST LOADS

R1

VTM

OUTPUT

30 pF

R2

Including

jig and

scope

Figure 1

R1

VTM

OUTPUT

5 pF

R2

Including

jig and

scope

Figure 2

4

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774

Rev. C

03/17/06

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