K4D263238A 查看數據表（PDF） - Samsung

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K4D263238A

1M x 32Bit x 4 Banks Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL

Samsung 

K4D263238A-GC

BLOCK DIAGRAM (1Mbit x 32I/O x 4 Bank)

128M DDR SDRAM

CK,CK

ADDR

Bank Select

CK, CK

32

Intput Buffer

LWE

Data Input Register

Serial to parallel

64

LDMi

1Mx32

1Mx32

1Mx32

1Mx32

64

32

x32

DQi

Column Decoder

Latency & Burst Length

LCKE

LRAS LCBR LWE

LCAS

Programming Register

LWCBR

Timing Register

DLL

CK,CK

LDMi

Data Strobe

(DQS0~DQS3)

CK,CK CKE CS RAS CAS WE DMi

-6-

Rev. 2.0 (Jan. 2003)

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