LA6568
Electrical Characteristics
(Unless specified otherwise, the conditions are Ta = 25°C, S–VCC = P–VCC = 8 V, VREF = 1.65 V)
Parameter
Symbol
Conditions
Ratings
min
typ
[Overall]
No load current drain - outputs on
No load current drain - outputs off
VREF input voltage range
ICC-ON
ICC-OFF
VREF-IN
All outputs on ∗1
All outputs off ∗1
30
10
0.5
[BTL Amplifier Block]
Output offset voltage
VOFF
The voltage difference between the output
amplifier outputs, for each channel
−50
Input voltage range
VIN
0
Output voltage
Closed circuit voltage gain 1
VO
VG1
The voltage between the VO+ and VO− outputs
when RL = 8 Ω ∗2
4
4.5
The gain between input and output for channels
1, 4, and 5
1.6
2
Closed circuit voltage gain 2
VG2
The gain between input and output for channel
2. Input resistance: 11 kΩ
3.5
4
Slew rate
SR
Twice the value between each output pair ∗3
1
Muting on voltage
VMUTE-ON For each of the muting functions ∗4
Muting off voltage
VMUTE-OFF For each of the muting functions ∗4
2
[Loading Block]
Voltage between outputs: F
Voltage between outputs: R
Output voltage range: F
Output voltage range: R
Output offset voltage
VOF
VOR
VOMF
VOMR
VOFF
VIN+ = 2 V, VIN−=0 V
VIN+ = 0 V, VIN− = 2 V
VIN+ = 5 V, VIN− = 0
VIN+ = 0 V, VIN− = 5 V
Potential difference between the outputs when
braking is applied
2.5
2.9
−3.3
−2.9
4.5
5.0
−5.0
−50
Input current
[3.3 V Regulator Block]
I-IN
When VIN = 3.3 V
Output voltage
Line regulation
Load regulation
[5 V Regulator Block]
VO-REG1
∆V-LIN1
∆V-LOAD1
IO = 100 mA
When IO = 100 mA, VCC = 6 to 12 V
When IO = 0 to 200 mA
3.15
3.3
−100
−100
Output voltage
VO-REG2
When IO = 3 mA
4.75
5
Line regulation
∆V-LIN1
When IO = 3 mA, VCC = 6 to 12 V
100
Load regulation
∆V-LOAD
When IO = 1 to 3 mA
100
[0-RESET Block] (Operating for VREF)
High-level reset output voltage
VORH
With a 10 kΩ resistor between VCC and RESET
6.5
Low-level reset output voltage
VORL
With a 10 kΩ resistor between VCC and RESET
0-RESET threshold voltage
VRT
0.5
0.7
0-RESET hysteresis
VHYS
50
100
Note ∗1: The combined current drain for P-VCC and S-VCC with no load
∗2: The voltage difference across the load (8Ω) terminals. With the outputs in the saturated state.
∗3: Design target value. Parameters are not tested.
∗4: When IN-MUTE is high: output on, when IN-MUTE is low: output off (high-impedance state)
Unit
max
50
mA
20
mA
VCC-1.5
V
+50
mV
VCC
V
V
2.4 Multiplier
4.5 Multiplier
V/µs
0.5
V
V
3.3
V
−2.5
V
V
−4.5
V
+50
mV
500
µA
3.45
V
+100
mV
+100
mV
5.25
V
mV
mV
V
0.5
V
0.9
V
200
mV
No.7740-2/8