LM3S801 查看數據表（PDF） - Unspecified

零件编号

产品描述 (功能)

生产厂家

LM3S801

Microcontroller

Unspecified 

LM3S801 Data Sheet

Register 5:

Register 6:

Register 7:

Register 8:

Register 9:

Register 10:

Register 11:

Register 12:

Register 13:

Register 14:

Register 15:

Register 16:

Register 17:

Register 18:

Register 19:

Register 20:

Register 21:

Register 22:

Register 23:

Register 24:

Register 25:

Register 26:

Register 27:

Register 28:

Register 29:

Register 30:

GPIO Interrupt Event (GPIOIEV), offset 0x40C....................................................................... 121

GPIO Interrupt Mask (GPIOIM), offset 0x410.......................................................................... 122

GPIO Raw Interrupt Status (GPIORIS), offset 0x414.............................................................. 123

GPIO Masked Interrupt Status (GPIOMIS), offset 0x418 ........................................................ 124

GPIO Interrupt Clear (GPIOICR), offset 0x41C....................................................................... 125

GPIO Alternate Function Select (GPIOAFSEL), offset 0x420 ................................................. 126

GPIO 2-mA Drive Select (GPIODR2R), offset 0x500.............................................................. 127

GPIO 4-mA Drive Select (GPIODR4R), offset 0x504.............................................................. 128

GPIO 8-mA Drive Select (GPIODR8R), offset 0x508.............................................................. 129

GPIO Open Drain Select (GPIOODR), offset 0x50C............................................................... 130

GPIO Pull-Up Select (GPIOPUR), offset 0x510 ...................................................................... 131

GPIO Pull-Down Select (GPIOPDR), offset 0x514.................................................................. 132

GPIO Slew Rate Control Select (GPIOSLR), offset 0x518...................................................... 133

GPIO Digital Input Enable (GPIODEN), offset 0x51C ............................................................. 134

GPIO Peripheral Identification 4 (GPIOPeriphID4), offset 0xFD0 ........................................... 135

GPIO Peripheral Identification 5 (GPIOPeriphID5), offset 0xFD4 ........................................... 136

GPIO Peripheral Identification 6 (GPIOPeriphID6), offset 0xFD8 ........................................... 137

GPIO Peripheral Identification 7 (GPIOPeriphID7), offset 0xFDC........................................... 138

GPIO Peripheral Identification 0 (GPIOPeriphID0), offset 0xFE0 ........................................... 139

GPIO Peripheral Identification 1(GPIOPeriphID1), offset 0xFE4 ............................................ 140

GPIO Peripheral Identification 2 (GPIOPeriphID2), offset 0xFE8 ........................................... 141

GPIO Peripheral Identification 3 (GPIOPeriphID3), offset 0xFEC........................................... 142

GPIO PrimeCell Identification 0 (GPIOPCellID0), offset 0xFF0 .............................................. 143

GPIO PrimeCell Identification 1 (GPIOPCellID1), offset 0xFF4 .............................................. 144

GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8 .............................................. 145

GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC.............................................. 146

General-Purpose Timers .............................................................................................................. 147

Register 1: GPTM Configuration (GPTMCFG), offset 0x000..................................................................... 159

Register 2: GPTM TimerA Mode (GPTMTAMR), offset 0x004 .................................................................. 160

Register 3: GPTM TimerB Mode (GPTMTBMR), offset 0x008 .................................................................. 161

Register 4: GPTM Control (GPTMCTL), offset 0x00C............................................................................... 162

Register 5: GPTM Interrupt Mask (GPTMIMR), offset 0x018 .................................................................... 164

Register 6: GPTM Raw Interrupt Status (GPTMRIS), offset 0x01C .......................................................... 166

Register 7: GPTM Masked Interrupt Status (GPTMMIS), offset 0x020 ..................................................... 167

Register 8: GPTM Interrupt Clear (GPTMICR), offset 0x024..................................................................... 168

Register 9: GPTM TimerA Interval Load (GPTMTAILR), offset 0x028 ...................................................... 169

Register 10: GPTM TimerB Interval Load (GPTMTBILR), offset 0x02C...................................................... 170

Register 11: GPTM TimerA Match (GPTMTAMATCHR), offset 0x030 ....................................................... 171

Register 12: GPTM TimerB Match (GPTMTBMATCHR), offset 0x034 ....................................................... 172

Register 13: GPTM TimerA Prescale (GPTMTAPR), offset 0x038.............................................................. 173

Register 14: GPTM TimerB Prescale (GPTMTBPR), offset 0x03C ............................................................. 174

Register 15: GPTM TimerA Prescale Match (GPTMTAPMR), offset 0x040................................................ 175

Register 16: GPTM TimerB Prescale Match (GPTMTBPMR), offset 0x044................................................ 176

Register 17: GPTM TimerA (GPTMTAR), offset 0x048 ............................................................................... 177

Register 18: GPTM TimerB (GPTMTBR), offset 0x04C .............................................................................. 178

Watchdog Timer............................................................................................................................ 179

Register 1: Watchdog Load (WDTLOAD), offset 0x000 ............................................................................ 182

Register 2: Watchdog Value (WDTVALUE), offset 0x004 ......................................................................... 183

October 8, 2006

13

Preliminary

Share Link: