LM3S801 查看數據表（PDF） - Unspecified
零件编号
产品描述 (功能)
生产厂家
LM3S801 Datasheet PDF : 397 Pages
| |||
List of Registers
Register 3:
Register 4:
Register 5:
Register 6:
Register 7:
Register 8:
Register 9:
Register 10:
Register 11:
Register 12:
Register 13:
Register 14:
Register 15:
Register 16:
Register 17:
Register 18:
Register 19:
Register 20:
Register 21:
Register 22:
Register 23:
Register 24:
Register 25:
Register 26:
Register 27:
Register 28:
Register 29:
Register 30:
Register 31:
Register 32:
Register 33:
Register 34:
Register 35:
Register 36:
Register 37:
Register 38:
Register 39:
Register 40:
Register 41:
Register 42:
Register 43:
Register 44:
Register 45:
Register 46:
Register 47:
Register 48:
PWM Output Enable (PWMENABLE), offset 0x008................................................................ 327
PWM Output Inversion (PWMINVERT), offset 0x00C............................................................. 328
PWM Output Fault (PWMFAULT), offset 0x010...................................................................... 329
PWM Interrupt Enable (PWMINTEN), offset 0x014................................................................. 330
PWM Raw Interrupt Status (PWMRIS), offset 0x018 .............................................................. 331
PWM Interrupt Status and Clear (PWMISC), offset 0x01C ..................................................... 332
PWM Status (PWMSTATUS), offset 0x020............................................................................. 333
PWM0 Control (PWM0CTL), offset 0x040............................................................................... 334
PWM1 Control (PWM1CTL), offset 0x080............................................................................... 334
PWM2 Control (PWM2CTL), offset 0x0C0 .............................................................................. 334
PWM0 Interrupt Enable (PWM0INTEN), offset 0x044............................................................. 336
PWM1 Interrupt Enable (PWM1INTEN), offset 0x084............................................................. 336
PWM2 Interrupt Enable (PWM2INTEN), offset 0x0C4 ............................................................ 336
PWM0 Raw Interrupt Status (PWM0RIS), offset 0x048 .......................................................... 337
PWM1 Raw Interrupt Status (PWM1RIS), offset 0x088 .......................................................... 337
PWM2 Raw Interrupt Status (PWM2RIS), offset 0x0C8.......................................................... 337
PWM0 Interrupt Status and Clear (PWM0ISC), offset 0x04C ................................................. 338
PWM1 Interrupt Status and Clear (PWM1ISC), offset 0x08C ................................................. 338
PWM2 Interrupt Status and Clear (PWM2ISC), offset 0x0CC................................................. 338
PWM0 Load (PWM0LOAD), offset 0x050 ............................................................................... 339
PWM1 Load (PWM1LOAD), offset 0x090 ............................................................................... 339
PWM2 Load (PWM2LOAD), offset 0x0D0............................................................................... 339
PWM0 Counter (PWM0COUNT), offset 0x054 ....................................................................... 340
PWM1 Counter (PWM1COUNT), offset 0x094 ....................................................................... 340
PWM2 Counter (PWM2COUNT), offset 0x0D4....................................................................... 340
PWM0 Compare A (PWM0CMPA), offset 0x058 .................................................................... 341
PWM1 Compare A (PWM1CMPA), offset 0x098 .................................................................... 341
PWM2 Compare A (PWM2CMPA), offset 0x0D8.................................................................... 341
PWM0 Compare B (PWM0CMPB), offset 0x05C.................................................................... 342
PWM1 Compare B (PWM1CMPB), offset 0x09C.................................................................... 342
PWM2 Compare B (PWM2CMPB), offset 0x0DC ................................................................... 342
PWM0 Generator A Control (PWM0GENA), offset 0x060....................................................... 343
PWM1 Generator A Control (PWM1GENA), offset 0x0A0 ...................................................... 343
PWM2 Generator A Control (PWM2GENA), offset 0x0E0 ...................................................... 343
PWM0 Generator B Control (PWM0GENB), offset 0x064....................................................... 345
PWM1 Generator B Control (PWM1GENB), offset 0x0A4 ...................................................... 345
PWM2 Generator B Control (PWM2GENB), offset 0x0E4 ...................................................... 345
PWM0 Dead-Band Control (PWM0DBCTL), offset 0x068 ...................................................... 346
PWM1 Dead-Band Control (PWM1DBCTL), offset 0x0A8 ...................................................... 346
PWM2 Dead-Band Control (PWM2DBCTL), offset 0x0E8 ...................................................... 346
PWM0 Dead-Band Rising-Edge Delay (PWM0DBRISE), offset 0x06C .................................. 347
PWM1 Dead-Band Rising-Edge Delay (PWM1DBRISE), offset 0x0AC.................................. 347
PWM2 Dead-Band Rising-Edge Delay (PWM2DBRISE), offset 0x0EC.................................. 347
PWM0 Dead-Band Falling-Edge-Delay (PWM0DBFALL), offset 0x070.................................. 348
PWM1 Dead-Band Falling-Edge-Delay (PWM1DBFALL), offset 0x0B0 ................................. 348
PWM2 Dead-Band Falling-Edge-Delay (PWM2DBFALL), offset 0x0F0 ................................. 348
Quadrature Encoder Interface (QEI)............................................................................................ 349
Register 1: QEI Control (QEICTL), offset 0x000........................................................................................ 353
Register 2: QEI Status (QEISTAT), offset 0x004....................................................................................... 355
Register 3: QEI Position (QEIPOS), offset 0x008...................................................................................... 356
16
October 8, 2006
Preliminary
Share Link: 