LT8610
TYPICAL PERFORMANCE CHARACTERISTICS
Transient Response
Start-Up Dropout Performance
Start-Up Dropout Performance
ILOAD
1A/DIV
VOUT
200mV/DIV
50µs/DIV
50mA TO 1A TRANSIENT
12VIN, 5VOUT
COUT = 47µF
8610 G36
VIN
2V/DIV
VOUT
2V/DIV
VIN
VOUT
100ms/DIV
2.5Ω LOAD
(2A IN REGULATION)
8610 G37
VIN
2V/DIV
VOUT
2V/DIV
VIN
VOUT
100ms/DIV
20Ω LOAD
(250mA IN REGULATION)
8610 G38
PIN FUNCTIONS
SYNC (Pin 1): External Clock Synchronization Input.
Ground this pin for low ripple Burst Mode operation at low
output loads. Tie to a clock source for synchronization to
an external frequency. Apply a DC voltage of 3V or higher
or tie to INTVCC for pulse-skipping mode. When in pulse-
skipping mode, the IQ will increase to several hundred µA.
Do not float this pin.
TR/SS (Pin 2): Output Tracking and Soft-Start Pin. This
pin allows user control of output voltage ramp rate during
start-up. A TR/SS voltage below 0.97V forces the LT8610
to regulate the FB pin to equal the TR/SS pin voltage. When
TR/SS is above 0.97V, the tracking function is disabled
and the internal reference resumes control of the error
amplifier. An internal 2.2μA pull-up current from INTVCC
on this pin allows a capacitor to program output voltage
slew rate. This pin is pulled to ground with an internal 230Ω
MOSFET during shutdown and fault conditions; use a series
resistor if driving from a low impedance output. This pin
may be left floating if the tracking function is not needed.
RT (Pin 3): A resistor is tied between RT and ground to
set the switching frequency.
EN/UV (Pin 4): The LT8610 is shut down when this pin
is low and active when this pin is high. The hysteretic
threshold voltage is 1.00V going up and 0.96V going
down. Tie to VIN if the shutdown feature is not used. An
external resistor divider from VIN can be used to program
a VIN threshold below which the LT8610 will shut down.
VIN (Pins 5, 6): The VIN pins supply current to the LT8610
internal circuitry and to the internal topside power switch.
These pins must be tied together and be locally bypassed.
Be sure to place the positive terminal of the input capaci-
tor as close as possible to the VIN pins, and the negative
capacitor terminal as close as possible to the PGND pins.
PGND (Pins 7, 8): Power Switch Ground. These pins are
the return path of the internal bottom-side power switch
and must be tied together. Place the negative terminal of
the input capacitor as close to the PGND pins as possible.
SW (Pins 9, 10, 11): The SW pins are the outputs of the
internal power switches. Tie these pins together and con-
nect them to the inductor and boost capacitor. This node
should be kept small on the PCB for good performance.
BST (Pin 12): This pin is used to provide a drive voltage,
higher than the input voltage, to the topside power switch.
Place a 0.1µF boost capacitor as close as possible to the IC.
INTVCC (Pin 13): Internal 3.4V Regulator Bypass Pin.
The internal power drivers and control circuits are pow-
ered from this voltage. INTVCC maximum output cur-
rent is 20mA. Do not load the INTVCC pin with external
circuitry. INTVCC current will be supplied from BIAS if
VBIAS > 3.1V, otherwise current will be drawn from VIN.
Voltage on INTVCC will vary between 2.8V and 3.4V when
VBIAS is between 3.0V and 3.6V. Decouple this pin to power
ground with at least a 1μF low ESR ceramic capacitor
placed close to the IC.
8610fa
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For more information www.linear.com/LT8610