LTC1740CGTRPBF 查看數據表（PDF） - Linear Technology

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LTC1740CGTRPBF

14-Bit, 6Msps, Sampling ADC

Linear Technology 

LTC1740

APPLICATIO S I FOR ATIO

Choosing an Input Amplifier

Choosing an input amplifier is easy if a few requirements

are taken into consideration. First, to limit the magnitude

of the voltage spike seen by the amplifier from charging

the sampling capacitor, choose an amplifier that has a low

output impedance (<100Ω) at the closed-loop bandwidth

frequency. For example, if an amplifier is used in a gain

of␣ 1 and has a unity-gain bandwidth of 50MHz, then the

output impedance at 50MHz must be less than 100Ω. The

second requirement is that the closed-loop bandwidth

must be greater than 50MHz to ensure adequate small-

signal settling for full throughput rate. If slower op amps

are used, more settling time can be provided by increasing

the time between conversions.

The best choice for an op amp to drive the LTC1740 will

depend on the application. Generally applications fall into

two categories: AC applications where dynamic specifica-

tions are most critical and time domain applications where

DC accuracy and settling time are most critical.

Input Filtering

The noise and the distortion of the input amplifier and

other circuitry must be considered since they will add to

the LTC1740 noise and distortion. The small-signal band-

width of the sample-and-hold circuit is 80MHz. Any noise

or distortion products that are present at the analog inputs

will be summed over this entire bandwidth. Noisy input

circuitry should be filtered prior to the analog inputs to

minimize noise. A simple 1-pole RC filter is sufficient for

many applications.

For example, Figure 9 shows a 1000pF capacitor from

+ AIN to – AIN and a 30Ω source resistor to limit the input

bandwidth to 5.3MHz. The 1000pF capacitor also acts as

a charge reservoir for the input sample-and-hold and iso-

lates the amplifier driving VIN from the ADC’s small current

glitch. In undersampling applications, an input capacitor

this large may prohibitively limit the input bandwidth.

If this is the case, use as large an input capacitance as

possible. High quality capacitors and resistors should be

30Ω

VIN

1000pF

+AIN

LTC1740

–AIN

1740 F09

Figure 9. RC Input Filter

used since these components can add distortion. NPO and

silver mica type dielectric capacitors have excellent linear-

ity. Carbon surface mount resistors can generate distor-

tion from self-heating and from damage that may occur

during soldering. Metal film surface mount resistors are

much less susceptible to both problems.

Digital Outputs and Overflow Bit (OF)

Figure 10 shows the ideal input/output characteristics for

the LTC1740. The output data is two’s complement binary

for all input ranges and for both single and dual supply

operation. One LSB = VREF/(0.9 • 16384). To create a

straight binary output, invert the MSB (D13). The overflow

bit (OF) indicates when the analog input is outside the

input range of the converter. OF is high when the output

code is 10 0000 0000 0000 or 01 1111 1111 1111.

011…111

011…110

011…101

1 OVERFLOW

0 BIT

100…010

100…001

100…000

–(FS – 1LSB)

INPUT VOLTAGE (V)

FS – 1LSB

1740 F10

Figure 10. LTC1740 Transfer Characteristics

1740f

12

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