LTC6912IGN-1 查看數據表（PDF） - Linear Technology
零件编号
产品描述 (功能)
生产厂家
LTC6912IGN-1 Datasheet PDF : 24 Pages
| |||
LTC6912
ELECTRICAL CHARACTERISTICS The ● denotes the specifications that apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = 5V, AGND = 2.5V, Gain = 1, RL = 10k to midsupply point, unless
otherwise noted.
PARAMETER
CONDITIONS
Specifications for the LTC6912-2 ONLY
Voltage Noise Density
(Referred to Input)
f = 50kHz
Gain = 1
Gain = 2
Gain = 4
Gain = 8
Gain = 16
Gain = 32
Gain = 64
Total Harmonic Distortion
Gain = 8, fIN = 10kHz, VOUT = 1VRMS
Gain = 8, fIN = 100kHz, VOUT = 1VRMS
C, I GRADES
MIN TYP MAX
H GRADE
MIN TYP MAX
UNITS
31.1
22.8
17
14.6
13.2
12.9
12.6
– 84
0.006
– 82
0.008
31.1
22.8
17
14.6
13.2
12.9
12.6
– 84
0.006
– 82
0.008
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
dB
%
dB
%
SERIAL I TERFACE SPECIFICATIO S
SYMBOL
PARAMETER
CONDITIONS
Digital I/O Logic Levels, All Digital I/O Voltage Referenced to DGND
VIH
Digital Input High Voltage
VIL
Digital Input Low Voltage
VOH
Digital Output High Voltage
Sourcing 500µA
VOL
Digital Output Low Voltage
Sinking 500µA
Serial Interface Timing, V+ = 2.7V ~ 4.5V, V– = 0V (Note 10)
t1
DIN Valid to CLK Setup
t2
DIN Valid to CLK Hold
t3
CLK Low
t4
CLK High
t5
CS/LD Pulse Width
t6
LSB CLK to CS/LD
t7
CS/LD Low to CLK
t8
DOUT Output Delay
CL = 15pF
t9
CLK Low to CS/LD Low
Serial Interface Timing, V+ = 4.5V ~ 5.5V, V– = 0V (Note 10)
t1
DIN Valid to CLK Setup
t2
DIN Valid to CLK Hold
t3
CLK Low
t4
CLK High
t5
CS/LD Pulse Width
t6
LSB CLK to CS/LD
t7
CS/LD Low to CLK
t8
DOUT Output Delay
CL = 15pF
t9
CLK Low to CS/LD Low
MIN TYP MAX UNITS
●2
●
● V+ – 0.3
●
V
0.8
V
V
0.3
V
● 60
●0
● 100
● 100
● 60
● 60
● 30
●
●0
ns
ns
ns
ns
ns
ns
ns
125
ns
ns
● 30
●0
● 50
● 50
● 40
● 40
● 20
●
●0
ns
ns
ns
ns
ns
ns
ns
85
ns
ns
6912fa
11
Share Link: 