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MAX3376EETA-T 查看數據表(PDF) - Maxim Integrated

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MAX3376EETA-T Datasheet PDF : 31 Pages
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±15kV ESD-Protected, 1µA, 16Mbps, Dual/Quad
Low-Voltage Level Translators in UCSP
RC 50MΩ to 100MΩ RD 330Ω
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
HIGH-
VOLTAGE
DC
SOURCE
Cs
150pF
STORAGE
CAPACITOR
DEVICE-
UNDER-
TEST
I
100%
90%
10%
tr = 0.7ns to 1ns
t
30ns
60ns
Figure 4a. IEC 1000-4-2 ESD Test Model
Applications Information
Power-Supply Decoupling
To reduce ripple and the chance of transmitting incor-
rect data, bypass VL and VCC to ground with a 0.1µF
capacitor. See the Typical Operating Circuit. To ensure
full ±15kV ESD protection, bypass VCC to ground with a
1µF capacitor. Place all capacitors as close to the
power-supply inputs as possible.
I2C Level Translation
The MAX3373E–MAX3376E, MAX3378E/MAX3379E
and MAX3390E–MAX3393E level-shift the data present
on the I/O lines between +1.2V and +5.5V, making
them ideal for level translation between a low-voltage
Figure 4b. IEC 1000-4-2 ESD Generator Current Waveform
ASIC and an I2C device. A typical application involves
interfacing a low-voltage microprocessor to a 3V or 5V
D/A converter, such as the MAX517.
Push-Pull vs. Open-Drain Driving
All devices in the MAX3372E–MAX3379E and
MAX3390E–MAX3393E family may be driven in a push-
pull configuration. The MAX3373E–MAX3376E/
MAX3378E/MAX3379E and MAX3390E–MAX3393E
include internal 10kΩ resistors that pull up I/O VL_ and
I/O VCC_ to their respective power supplies, allowing
operation of the I/O lines with open-drain devices. See
the Timing Characteristics table for maximum data rates
when using open-drain drivers.
Typical Operating Circuit
+1.8V
0.1μF
+1.8V
SYSTEM
CONTROLLER
DATA
VL VCC
THREE-STATE
MAX3378E–MAX3383E
I/O VL_
I/O VCC_
0.1μF
+3.3V
SYSTEM
DATA
+3.3V
1μF
14 ______________________________________________________________________________________

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