MB3879 查看數據表（PDF） - Fujitsu
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MB3879 Datasheet PDF : 54 Pages
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MB3879
(7) Error amplifiers block (Error Amp5 and Error Amp6)
The error amplifiers (Error Amp5 and Error Amp6) detect the DC/DC converter output voltage and outputs PWM
control signals. An on-chip output voltage setting resistor is provided on the IC, external output voltage setting
resistor is not needed. A 4-bit decoder selects output voltage among 12.6V (3 cells), 12.3V (3 cells), 16.8V (4
cells), and 16.4V (4 cells), which are applicable to NiMH batteries as well as Li-ion batteries.
In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from FB5 terminal
(pin 30) to -INE5 terminal (pin 29)and from FB6 terminal (pin 20) to -INE6 terminal (pin 21), enabling stable
phase compensation to be provided for the system.
This block also outputs signal to mode detection block.
By connecting a soft-start capacitor to CS2 terminal (pin 22), an inrush current upon power supply startup is
prevented. By detecting soft-start with the error amplifier, soft-start time becomes constant, being independent
of output loads.
(8) Current detection amplifier block (Current Amp1)
The current detection amplifier (Current Amp1) detects voltage dropping occurring across the both sides of
output sense resistor (RS1) between +INC1 terminal (pin 48) and -INC1 terminal (pin 47), regarding total current
between system current and control IC input current. This block outputs the signal amplified 25 times to next
stage error amplifier (Error Amp1).
(9) Current detection amplifier block (Current Amp2 and Current Amp3)
The current detection amplifiers (Current Amp2 and Current Amp3) detect voltage dropping occurring across
the both sides of output sense resistor (RS2) between +INC2 terminal (pin 15) and IN1 terminal (pin 14), regarding
total current between system current and control IC input current. This block outputs the signal amplified 25
times to next stage error amplifier (Error Amp3).
The current detection amplifier (Current Amp3) detects voltage dropping occurring across the both sides of
output sense resistor (RS3) between +INC3 terminal (pin 35) and IN2 terminal (pin 36), and then outputs the
signal amplified 25 times to next stage error amplifier (Error Amp3).
(10) PWM comparator block (PWM Comp.)
The PWM comparator is a voltage-to-pulse width converter for controlling the output duty depending on the
output voltage of the error amplifiers. The comparator compares the triangular wave generated by the triangular
wave oscillator with the output voltage of error amplifier and voltage of DTC terminal (pin 39), and turns on Pch
MOS FET when triangular wave voltage is lower than output voltage of error amplifier and voltage of DTC terminal.
(11) Output block (OUT)
The output block is designed in the totem pole configuration, capable of driving an external P-channel
MOS FET. Output amplitude is set to "6V (typical)" at "L" level on output stage by using a voltage generated in
bias voltage block.
This feature allows higher conversion efficiency and low withstanding voltages on external Pch MOS FET even
under wide input voltage range.
(12) Bias voltage block (VH)
The Bias voltage block output a minimum voltage of output circuit, Vcc-6V (typical).
A same voltage as Vcc is output under standby status.
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