MB90800(2004) 查看數據表（PDF） - Fujitsu
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MB90800 Datasheet PDF : 88 Pages
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MB90800 Series
s PRODUCT LINEUP
1. MB90800 Series
Part number
MB90V800
MB90F804-101/201
MB90803/S
Type
For evaluation
FLASH MEMORY
built-in type
Mask ROM
built-in type
System clock
On-chip PLL clock multiplication method( × 1, × 2, × 3, × 4, 1/2 when PLL stops)
Minimum instruction execution time of 40.0 ns
(at oscillation of 6.25 MHz, four times the PLL clock)
ROM capacity
No
256 Kbytes
128 Kbytes
RAM capacity
28 Kbytes
16 Kbytes
4 Kbytes
CPU functions
Number of basic instructions : 351
Minimum instruction execution time : 40.0 ns/6.25 MHz oscillator
(When four times is used : machine clock
25 MHz, Power supply voltage : 3.3 V ± 0.3 V)
Addressing type : 23 types
Program Patch Function : 2 address pointers
The maximum memory space : 16MB
Ports
I/O port (CMOS) 68 ports (shared with resources), (70 ports when the subclock is
not used)
LCD controller/driver
Segment driver that can drive the LCD panel (liquid crystal display) directly, and
common driver 48 SEG × 4 COM
16-bit
input/
output
timer
16-bit free-run
timer
Output compare
(OCU)
Input capture
(ICU)
1 channel
Overflow interrupt
2 channels
Pin input factor: matching of the compare register
2 channels
Rewriting a register value upon a pin input (rising edge, falling edge, or both edges)
16-Bit Reload Timer
16-bit reload timer operation (toggle output, single shot output selectable)
The event count function is optional. The event count function is optional.
Three channels are built in.
16-bit PPG timer
Output pin × 2 ports
Operating clock frequency : fcp, fcp/22, fcp/24, fcp/26
Two channels are built in.
Timer clock output circuit
Clock with a frequency of external input clock divided by 16/32/64/128 can be
output externally.
I2C bus
I2C Interface. 1 channel is built-in.
8/10-bit A/D converter
12 channels (input multiplex)
The 8-bit resolution or 10-bit resolution can be set.
Conversion time : 5.9 µs (When machine clock 16.8 MHz works).
UART
Full-duplex double buffer
Asynchronous/synchronous transmit (with start/stop bits) are supported.
Two channels are built in.
Extended I/O serial interface Two channels are built in.
Interrupt delay interrupt
Four channel independence (A/D input and using combinedly)
Interrupt causes : “L”→“H” edge/“H”→“L” edge/“L” level/“H” level selectable
DTP/External interrupt
8 channels (The 8 channels include with the shared A/D input)
Interrupt causes：“L”→“H” edge/“H”→“L” edge/“L” level/“H” level selectable
Low Power Consumption Mode Sleep mode/Timebase timer mode/Watch mode/Stop mode/CPU intermittent mode
Process
CMOS
Operating voltage
2.7 V to 3.6 V
4
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