MC33596(2007) 查看數據表（PDF） - Freescale Semiconductor

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MC33596
(Rev.:2007)

PLL Tuned UHF Receiver for Data Transfer Applications

Freescale Semiconductor 

Register Access through SPI

R/W specifies the type of operation:

0 = Read

1 = Write

Thus, this bit is associated with the presence of information on MOSI (when writing) or MISO (when

reading).

Figure 4 and Figure 5 show write and read operations in a typical SPI transfer. In both cases, the SPI is a

slave. A received byte is considered internally on the eighth falling edge of SCLK. Consequently, the last

received bits, which do not form a complete byte, are lost.

NOTE

A low level applied to CONFB does not affect the configuration register

contents.

SEB

CONFB

SCLK

(Input)

MOSI

(Input)

MISO

(Output)

N1 N0 A4 A3 A2 A1 A0 R/W

D7 D6 D5 D4 D3 D2 D1 D0

D7 D6 D5 D4 D3 D2 D1 D0

Figure 4. Write Operation in Configuration Mode (N[1:0] = 01)

SEB

CONFB

SCLK

(Input)

MOSI

(Input)

MISO

(Output)

N1 N0 A4 A3 A2 A1 A0 R/W

D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0

Figure 5. Read Operation in Configuration Mode (N[1:0] = 01)

10.3 Configuration Switching

This feature allows for defining two different configurations using two different banks, and for switching

them automatically during wakeup when using a strobe oscillator, or by means of the strobe pin actuation

by the MCU.

MC33596 Data Sheet, Rev. 3

Freescale Semiconductor

11

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