MC74VHC257(2001) 查看數據表（PDF） - ON Semiconductor
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MC74VHC257 Datasheet PDF : 8 Pages
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NIBBLE
INPUTS
OE
S
2
A0
3
B0
A1 5
B1 6
11
A2
10
B2
A3 14
B3 13
15
1
MC74VHC257
4 Y0
7
Y1
9 Y2
DATA
OUTPUTS
12 Y3
OE 15
S1
A0 2
B0 3
A1 5
B1 6
A2 11
B2 10
A3 14
B3 13
EN
G1
1 MUX
1
4
Y0
7
Y1
9
Y2
12
Y3
Figure 2. Expanded Logic Diagram
Figure 3. IEC Logic Symbol
FUNCTION TABLE
Inputs
OE
S
Outputs
Y0 – Y3
H
X
L
L
L
A0–A3
L
H
B0–B3
A0 – A3, B0 – B3 = the levels
of the respective Data–Word
Inputs.
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND v (Vin or Vout) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
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