MCP3002-I 查看數據表（PDF） - Microchip Technology
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MCP3002-I Datasheet PDF : 34 Pages
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MCP3002
CS
SCLK
DIN
MCU latches data from A/D Converter
on rising edges of SCLK
1234567
8
9 10 11 12 13 14 15 16
Data is clocked out of
A/D Converter on falling edges
Don’t Care
DOUT
MCU Transmitted Data
(Aligned with falling
edge of clock)
MCU Received Data
(Aligned with rising
edge of clock)
X = Don’t Care Bits
HI-Z
NULL
BIT
B9
B8
Start
Bit
X
1
SGL/
DIFF
ODD/
SIGN
MSBF
X
X
X
X
X
X
X
X
0
(Null)
B9
B8
Data stored into MCU receive register
after transmission of first 8 bits
B7 B6 B5 B4 B3 B2 B1 B0
XXXXXXXX
B7 B6 B5 B4 B3 B2 B1 B0
Data stored into MCU receive register
after transmission of second 8 bits
FIGURE 6-2:
high).
SPI Communication with the MCP3002 using 8-bit segments (Mode 1,1: SCLK idles
6.2 Maintaining Minimum Clock Speed
When the MCP3002 initiates the sample period, charge
is stored on the sample capacitor. When the sample
period is complete, the device converts one bit for each
clock that is received. It is important for the user to note
that a slow clock rate will allow charge to bleed off the
sample cap while the conversion is taking place. At
85°C (worst case condition), the part will maintain
proper charge on the sample cap for 700 µs at
VDD = 2.7V and 1.5 ms at VDD = 5V. This means that at
VDD = 2.7V, the time it takes to transmit the 1.5 clocks
for the sample period and the 10 clocks for the actual
conversion must not exceed 700 µs. Failure to meet
this criteria may induce linearity errors into the
conversion outside the rated specifications.
6.3 Buffering/Filtering the Analog
Inputs
If the signal source for the A/D Converter is not a low
impedance source, it will have to be buffered or
inaccurate conversion results may occur. It is also
recommended that a filter be used to eliminate any
signals that may be aliased back in to the conversion
results. This is illustrated in Figure 6-3 below where an
op amp is used to drive, filter, and gain the analog input
of the MCP3002. This amplifier provides a low
impedance output for the converter input and a low-
pass filter, which eliminates unwanted high-frequency
noise.
Low-pass (anti-aliasing) filters can be designed using
Microchip’s interactive FilterLab® software. FilterLab
will calculate capacitor and resistors values, as well as,
determine the number of poles that are required for the
application. For more information on filtering signals,
see the application note AN699 “Anti-Aliasing Analog
Filters for Data Acquisition Systems.”
R1 C1
VIN
R2
C2
MCP601
+
-
R3 R4
VDD
10 µF
1 µF
IN+
MCP3002
IN-
FIGURE 6-3:
Typical Anti-Aliasing Filter
Circuit (2 pole Active Filter).
DS21294D-page 20
© 2008 Microchip Technology Inc.
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