MICRF221 查看數據表（PDF） - Micrel
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MICRF221 Datasheet PDF : 26 Pages
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Micrel Inc.
Pin Configuration
MICRF221
RO1 1
GNDRF 2
ANT 3
GNDRF 4
Vdd 5
SQ 6
SEL0 7
SHDN 8
16 RO2
15 SCLK
14 RSSI
13 CAGC
12 CTH
11 SEL1
10 DO
9 GND
Pin Description
Figure 2. MICRF221AYQS Pin Configuration
16-Pin
QSOP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin
Name
RO1
GNDRF
ANT
GNDRF
Vdd
SQ
SEL0
SHDN
GND
DO
SEL1
CTH
CAGC
RSSI
SCLK
RO2
Pin Function
Reference Oscillator (input): Reference resonator input connection to pierce oscillator stage. May also
be driven by external reference signal of 1.5V p-p amplitude maximum. 7pF to GND during normal
operation.
Negative supply connection associated with ANT RF input.
Antenna (input): RF signal input from antenna. Internally AC coupled. It is recommended a matching
network with an inductor-to-RF ground be used to improve ESD protection.
Negative supply connection associated with ANT RF input.
Positive supply connection for all chip functions.
Squelch control logic input with an active internal pull-up when not shut down. Low to reverse level set
by serial interface bit D17. Low enables squelch for default SIF register.
Select (input): Logic control input with active 3μA (8μA max) internal pull-up when not in shutdown or
SLEEP mode. It does not need to be defined in SLEEP mode. Used in conjunction with SEL1 to control
D3 bandwidth LSB when serial interface contains default setting.
Shutdown logic control input. Active internal pull-up.
Negative supply connection for all chip functions except for RF input.
Demodulated data (output): May be blanked until bit checking test is acceptable. A current limited
CMOS output during normal operation this pin is also used as a CMOS Schmitt input for serial interface
data. A 25kΩ pull-down is present when device is in shutdown and sleep modes.
Select (input): Logic control input with active 3μA (8μA max) internal pull-up when not in shutdown or
SLEEP mode. It does not need to be defined in SLEEP mode. Used in conjunction with SEL0, to control
D4 bandwidth MSB, when serial interface contains default setting.
Demodulation threshold voltage integration capacitor. Capacitor-to-GND sets the settling time for the
demodulation data slicing level. Values above 1nF are recommended and should be optimized for data
rate and data profile.
AGC filter capacitor. A capacitor, normally greater than 0.47μF, is connected from this pin-to-GND
Received signal strength indication (output): Output is from a switched capacitor integrating op amp
with 220Ω typical output impedance.
Serial interface input clock. CMOS Schmitt input. A 25kΩ pull-down is present when device is in
shutdown mode.
Reference resonator connection. 7pF to GND during normal operation.
October 2008
2
M9999-100108
(408) 955-1690
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