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MM74C74MX 查看數據表(PDF) - Fairchild Semiconductor

零件编号
产品描述 (功能)
生产厂家
MM74C74MX
Fairchild
Fairchild Semiconductor 
MM74C74MX Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
AC Electrical Characteristics (Note 3)
TA = 25°C, CL = 50 pF, unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CIN
Input Capacitance
Any Input (Note 4)
tpd
Propagation Delay Time to a
VCC = 5V
Logical 0tpd0 or Logical 1
VCC = 10V
tpd1 from Clock to Q or Q
tpd
Propagation Delay Time to a
VCC = 5V
Logical 0from Preset or Clear
VCC = 10V
tpd
Propagation Delay Time to a
VCC = 5V
Logical 1from Preset or Clear
VCC = 10V
tS0, tS1
Time Prior to Clock Pulse that
VCC = 5V
Data Must be Present tSETUP
VCC = 10V
tH0, tH1
Time after Clock Pulse that
VCC = 5V
Data Must be Held
VCC = 10V
tPW1
Minimum Clock Pulse
VCC = 5V
Width (tWL = tWH)
VCC = 10V
tPW2
Minimum Preset and
VCC = 5V
Clear Pulse Width
VCC = 10V
tr, tf
Maximum Clock Rise
VCC = 5V
and Fall Time
VCC = 10V
fMAX
Maximum Clock Frequency
VCC = 5V
VCC = 10V
CPD
Power Dissipation Capacitance
(Note 5)
Note 3: AC Parameters are guaranteed by DC correlated testing.
5.0
180
300
70
110
180
300
70
110
250
400
100
150
100
50
40
20
20
0
8.0
0
100
250
40
100
100
160
40
70
15.0
5.0
2.0
3.5
5.0
8.0
40
pF
ns
ns
ns
ns
ns
ns
ns
µs
MHz
pF
Note 4: Capacitance is guaranteed by periodic testing.
Note 5: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics Application Note
AN-90.
Typical Applications
Ripple Counter (Divide by 2n)
74C Compatibility
Shift Register
Guaranteed Noise Margin as a Function of VCC
www.fairchildsemi.com
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