MPC5644A 查看數據表（PDF） - Freescale Semiconductor

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MPC5644A

Microcontroller

Freescale Semiconductor 

— Provides time stamp information when requested

— Allows time stamp information relative to eTPU clock sources, such as an angle clock

— Parallel interface to eQADC CFIFOs and RFIFOs

— Supports both right-justified unsigned and signed formats for conversion results

• 40 single-ended input channels, expandable to 56 channels with external multiplexers (supports four external 8-to-1

muxes)

• 8 channels can be used as 4 pairs of differential analog input channels

• Differential channels include variable gain amplifier for improved dynamic range

• Differential channels include programmable pull-up and pull-down resistors for biasing and sensor diagnostics

(200 k100 k5 k

• Additional internal channels for monitoring voltages (such as core voltage, I/O voltage, LVI voltages, etc.) inside the

device

• An internal bandgap reference to allow absolute voltage measurements

• Silicon die temperature sensor

— Provides temperature of silicon as an analog value

— Read using an internal ADC analog channel

— May be read with either ADC

• 2 Decimation Filters

— Programmable decimation factor (1 to 16)

— Selectable IIR or FIR filter

— Up to 4th order IIR or 8th order FIR

— Programmable coefficients

— Saturated or non-saturated modes

— Programmable Rounding (Convergent; Two’s Complement; Truncated)

— Prefill mode to precondition the filter before the sample window opens

— Supports Multiple Cascading Decimation Filters to implement more complex filter designs

— Optional Absolute Integrators on the output of Decimation Filters

• Full duplex synchronous serial interface to an external device

— Free-running clock for use by an external device

— Supports a 26-bit message length

• Priority based queues

— Supports six queues with fixed priority. When commands of distinct queues are bound for the same ADC, the

higher priority queue is always served first

— Queue_0 can bypass all prioritization, buffering and abort current conversions to start a Queue_0 conversion a

deterministic time after the queue trigger

— Supports software and hardware trigger modes to arm a particular queue

— Generates interrupt when command coherency is not achieved

• External hardware triggers

— Supports rising edge, falling edge, high level and low level triggers

— Supports configurable digital filter

1.4.14 DSPI

The deserial serial peripheral interface (DSPI) block provides a synchronous serial interface for communication between the

MPC5644A MCU and external devices. The DSPI supports pin count reduction through serialization and deserialization of

eTPU and eMIOS channels and memory-mapped registers. The channels and register content are transmitted using a SPI-like

protocol. This SPI-like protocol is completely configurable for baud rate, polarity and phase, frame length, chip select assertion,

MPC5644A Microcontroller Data Sheet, Rev. 7

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Freescale Semiconductor

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