s MSM10S0000 s ––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
Timing Variation
Delay variations due to process and operating conditions (temperature and voltage) form the total circuit
delay factor described by the relationship:
δ = δT × δV × δP
Values for δT and δV are shown in Figure 2and Figure 3.
δV
2.02
2.0
1.74
Tj = -40 to +85°C
1.53
1.5
1.36
1.09
1.05
1.0
1.0
0.963
0.927
2.7 3.0 3.3 3.6
VDD (V)
4.5 4.75 5.0 5.25 5.5
Figure 2. δV vs VDD Characteristics
δT
1.4
VDD = 2.7 to 5.5 V
1.2
1.27
1.20
1.16
1.12
1.07
1.00
1.0
0.933
0.879
0.825
∆T = 0.0027 x Tj + 0.933
0.8
-40
-20
0
25
50
70 85 100
125
Tj (°C)
Figure 3. δT vs Tj Characteristics
8
Oki Semiconductor